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BSDL File: mt90880 Download View details  


-- Information relating to Products and circuits ('Product') furnished
-- herein by Zarlink Semiconductor or its subsidiaries ('Zarlink') is
-- believed to be reliable. However,Zarlink assumes no liability for
-- errors that may appear in this document,or for liability otherwise
-- arising from the application or use of any such information or
-- product or any infringement of patients or other intellectual
-- property rights owned by third parties which may result from such
-- applications or use. Neither the supply of such information or the
-- purchase of product conveys any license,either expressed or implied,
-- under patents or other intellectual property rights owned by Zarlink
-- or licensed from third parties by Zarlink,whatsoever. Purchaser
-- of Product are also hereby notified that the use of Products in
-- certain ways or in combination with Zarlink or non-Zarlink furnished
-- goods or services may infringe patents or other intellectual property
-- rights owned by Zarlink. The Products,their specifications and the
-- information appearing in the document are subject to change by
-- Zarlink without notice.

-- Zarlink Semiconductor (c) 2001

-- The Boundary Scan patterns are for use at nominal supply conditions
-- and an ambient temperature of 15-30 degrees Celsius.

-- Generated by boundaryScanGenerate 3.3c-Build20010123.006
-- on 08/14/01 16:39:25
-- BSDL Version 1994

entity mt90880 is
    generic (PHYSICAL_PIN_MAP : string := "DEFAULT_PACKAGE_NAME");

    port (
        -- Port List
        jtagdin              : in       bit;
        jtagclk              : in       bit;
        pci_inta_n           : out      bit;
        pci_rst_n            : in       bit;
        pci_clk              : inout    bit;
        pci_gnt_n            : inout    bit;
        pci_req_n            : out      bit;
        pci_ad               : inout    bit_vector( 31 downto 0 );
        pci_cbe_n            : inout    bit_vector( 3 downto 0 );
        pci_idsel            : inout    bit;
        pclk_at1             : linkage  bit;
        iddq                 : in       bit;
        pci_frame_n          : inout    bit;
        pci_irdy_n           : inout    bit;
        pci_trdy_n           : inout    bit;
        pci_devsel_n         : inout    bit;
        pci_stop_n           : inout    bit;
        pci_lock_n           : inout    bit;
        pci_perr_n           : inout    bit;
        pci_serr_n           : out      bit;
        pci_par              : inout    bit;
        wan_clko             : out      bit;
        wan_frmo             : out      bit;
        pci_m66en            : inout    bit;
        wan_clki             : in       bit_vector( 31 downto 0 );
        wan_frmi             : in       bit_vector( 31 downto 0 );
        wan_sti              : in       bit_vector( 31 downto 0 );
        wan_sto              : out      bit_vector( 31 downto 0 );
        s_rst_b              : in       bit;
        rstout_b             : out      bit;
        sclk_at1             : linkage  bit;
        s_clk                : in       bit;
        ode                  : in       bit;
        c4ob                 : out      bit;
        c8ob                 : out      bit;
        c16ob                : out      bit;
        fp4ob                : out      bit;
        fp8ob                : out      bit;
        fp16ob               : out      bit;
        loc_sti              : in       bit_vector( 31 downto 0 );
        loc_sto              : out      bit_vector( 31 downto 0 );
        ram_d                : inout    bit_vector( 31 downto 0 );
        ram_a                : out      bit_vector( 22 downto 2 );
        ram_clk              : out      bit;
        ram_rw3_b            : out      bit;
        ram_rw2_b            : out      bit;
        ram_rw1_b            : out      bit;
        ram_rw0_b            : out      bit;
        ram_oe3_b            : out      bit;
        ram_oe2_b            : out      bit;
        ram_oe1_b            : out      bit;
        ram_oe0_b            : out      bit;
        ram_adsc_b           : out      bit;
        m0_txen              : out      bit;
        m0_txd               : out      bit_vector( 3 downto 0 );
        m_mint0              : in       bit;
        m0_txclk             : in       bit;
        m0_col               : in       bit;
        m0_crs               : in       bit;
        m0_rxer              : in       bit;
        m0_rxclk             : in       bit;
        m0_rxdv              : in       bit;
        m0_rxd               : in       bit_vector( 3 downto 0 );
        m_mdio               : inout    bit;
        m_mdc                : inout    bit;
        refclk               : in       bit;
        m1_txen              : out      bit;
        m1_txd               : out      bit_vector( 3 downto 0 );
        m_mint1              : in       bit;
        m1_txclk             : in       bit;
        m1_col               : in       bit;
        m1_crs               : in       bit;
        m1_rxer              : in       bit;
        m1_rxclk             : in       bit;
        m1_rxdv              : in       bit;
        m1_rxd               : in       bit_vector( 3 downto 0 );
        t_mode0              : in       bit;
        t_mode1              : in       bit;
        t_d                  : inout    bit_vector( 15 downto 0 );
        jtagrst_b            : in       bit;
        jtagdout             : out      bit;
        jtagmode             : in       bit;
NC    : linkage bit_vector (1 to 2); -- No Connects
A1VDD: linkage bit; -- PLL Supply
A2VDD: linkage bit; -- PLL Supply
VDD18: linkage bit_vector (1 to 12); -- Core Supply
VDD33: linkage bit_vector (1 to 22); -- Periphery Supply
GND: linkage bit_vector (1 to 38) -- Ground
);

use STD_1149_1_1994.all;
use LVS_BSCAN_CELLS.all;

attribute COMPONENT_CONFORMANCE of mt90880: entity is "STD_1149_1_1993";

--Pin mappings

attribute PIN_MAP of mt90880: entity is PHYSICAL_PIN_MAP;

constant DEFAULT_PACKAGE_NAME: PIN_MAP_STRING :=
    "jtagdin              : AD18   ," &
    "jtagclk              : AB18   ," &
    "pci_inta_n           : AF19   ," &
    "pci_rst_n            : AE19   ," &
    "pci_clk              : AF20   ," &
    "pci_gnt_n            : AD19   ," &
    "pci_req_n            : AC19   ," &
    "pci_ad               :(AE20  ," &  -- pci_ad[31]
                           "AB19  ," &  -- pci_ad[30]
                           "AF21  ," &  -- pci_ad[29]
                           "AC20  ," &  -- pci_ad[28]
                           "AD20  ," &  -- pci_ad[27]
                           "AE21  ," &  -- pci_ad[26]
                           "AF22  ," &  -- pci_ad[25]
                           "AD21  ," &  -- pci_ad[24]
                           "AF23 ," &  -- pci_ad[23]
                           "AD22 ," &  -- pci_ad[22]
                           "AE23 ," &  -- pci_ad[21]
                           "AC21 ," &  -- pci_ad[20]
                           "AE24 ," &  -- pci_ad[19]
                           "AC22 ," &  -- pci_ad[18]
                           "AD24 ," &  -- pci_ad[17]
                           "AC23 ," &  -- pci_ad[16]
                           "AC26 ," &  -- pci_ad[15]
                           "AB25 ," &  -- pci_ad[14]
                           "W23 ," &  -- pci_ad[13]
                           "AA24 ," &  -- pci_ad[12]
                           "AB26 ," &  -- pci_ad[11]
                           "AA25 ," &  -- pci_ad[10]
                           "Y24 ," &  -- pci_ad[9]
                           "AA26 ," &  -- pci_ad[8]
                           "V24 ," &  -- pci_ad[7]
                           "U23 ," &  -- pci_ad[6]
                           "V25 ," &  -- pci_ad[5]
                           "T23 ," &  -- pci_ad[4]
                           "T24 ," &  -- pci_ad[3]
                           "R23 ," &  -- pci_ad[2]
                           "T25 ," &  -- pci_ad[1]
                           "T26)," &  -- pci_ad[0]
    "pci_cbe_n            :(AE22  ," &  -- pci_cbe_n[3]
                           "AB23 ," &  -- pci_cbe_n[2]
                           "Y23 ," &  -- pci_cbe_n[1]
                           "W24)," &  -- pci_cbe_n[0]
    "pci_idsel            : AB20   ," &
    "pclk_at1             : AF24   ," &
    "iddq                 : AD23   ," &
    "pci_frame_n          : AE25 ," &
    "pci_irdy_n           : AF26 ," &
    "pci_trdy_n           : AA23 ," &
    "pci_devsel_n         : AE26 ," &
    "pci_stop_n           : AC24 ," &
    "pci_lock_n           : Y22   ," &
    "pci_perr_n           : AD26 ," &
    "pci_serr_n           : AB24   ," &
    "pci_par              : AC25 ," &
    "wan_clko             : V22   ," &
    "wan_frmo             : V23   ," &
    "pci_m66en            : Y25   ," &
    "wan_clki             :(U22  ," &  -- wan_clki[31]
                           "V26  ," &  -- wan_clki[30]
                           "N23  ," &  -- wan_clki[29]
                           "P24  ," &  -- wan_clki[28]
                           "M22  ," &  -- wan_clki[27]
                           "N24  ," &  -- wan_clki[26]
                           "K23  ," &  -- wan_clki[25]
                           "L24  ," &  -- wan_clki[24]
                           "J23  ," &  -- wan_clki[23]
                           "J24  ," &  -- wan_clki[22]
                           "H22  ," &  -- wan_clki[21]
                           "G22  ," &  -- wan_clki[20]
                           "E26  ," &  -- wan_clki[19]
                           "E24  ," &  -- wan_clki[18]
                           "A26  ," &  -- wan_clki[17]
                           "A24  ," &  -- wan_clki[16]
                           "A23  ," &  -- wan_clki[15]
                           "E19  ," &  -- wan_clki[14]
                           "B21  ," &  -- wan_clki[13]
                           "B20  ," &  -- wan_clki[12]
                           "A20  ," &  -- wan_clki[11]
                           "B18  ," &  -- wan_clki[10]
                           "C17  ," &  -- wan_clki[9]
                           "C16  ," &  -- wan_clki[8]
                           "D15  ," &  -- wan_clki[7]
                           "A15  ," &  -- wan_clki[6]
                           "D13  ," &  -- wan_clki[5]
                           "E12  ," &  -- wan_clki[4]
                           "C12  ," &  -- wan_clki[3]
                           "B11 ," &  -- wan_clki[2]
                           "B10 ," &  -- wan_clki[1]
                           "B9)," &  -- wan_clki[0]
    "wan_frmi             :(W25  ," &  -- wan_frmi[31]
                           "U24  ," &  -- wan_frmi[30]
                           "R24  ," &  -- wan_frmi[29]
                           "P25  ," &  -- wan_frmi[28]
                           "N26  ," &  -- wan_frmi[27]
                           "M25  ," &  -- wan_frmi[26]
                           "L26  ," &  -- wan_frmi[25]
                           "K26  ," &  -- wan_frmi[24]
                           "J26  ," &  -- wan_frmi[23]
                           "H26  ," &  -- wan_frmi[22]
                           "H24  ," &  -- wan_frmi[21]
                           "F26  ," &  -- wan_frmi[20]
                           "F23  ," &  -- wan_frmi[19]
                           "C26  ," &  -- wan_frmi[18]
                           "A25  ," &  -- wan_frmi[17]
                           "C23  ," &  -- wan_frmi[16]
                           "C22  ," &  -- wan_frmi[15]
                           "C21  ," &  -- wan_frmi[14]
                           "C20  ," &  -- wan_frmi[13]
                           "D18  ," &  -- wan_frmi[12]
                           "B19  ," &  -- wan_frmi[11]
                           "D17  ," &  -- wan_frmi[10]
                           "D16  ," &  -- wan_frmi[9]
                           "B16  ," &  -- wan_frmi[8]
                           "C15  ," &  -- wan_frmi[7]
                           "C14  ," &  -- wan_frmi[6]
                           "A13  ," &  -- wan_frmi[5]
                           "C13  ," &  -- wan_frmi[4]
                           "D11  ," &  -- wan_frmi[3]
                           "D10 ," &  -- wan_frmi[2]
                           "C10 ," &  -- wan_frmi[1]
                           "D9)," &  -- wan_frmi[0]
    "wan_sti              :(W26  ," &  -- wan_sti[31]
                           "U25  ," &  -- wan_sti[30]
                           "R25  ," &  -- wan_sti[29]
                           "M23  ," &  -- wan_sti[28]
                           "L23  ," &  -- wan_sti[27]
                           "L22  ," &  -- wan_sti[26]
                           "K22  ," &  -- wan_sti[25]
                           "K25  ," &  -- wan_sti[24]
                           "J22  ," &  -- wan_sti[23]
                           "H25  ," &  -- wan_sti[22]
                           "G23  ," &  -- wan_sti[21]
                           "F25  ," &  -- wan_sti[20]
                           "E25  ," &  -- wan_sti[19]
                           "C24  ," &  -- wan_sti[18]
                           "D21  ," &  -- wan_sti[17]
                           "E20  ," &  -- wan_sti[16]
                           "D20  ," &  -- wan_sti[15]
                           "D19  ," &  -- wan_sti[14]
                           "A21  ," &  -- wan_sti[13]
                           "C19  ," &  -- wan_sti[12]
                           "A19  ," &  -- wan_sti[11]
                           "A18  ," &  -- wan_sti[10]
                           "B17  ," &  -- wan_sti[9]
                           "E15  ," &  -- wan_sti[8]
                           "D14  ," &  -- wan_sti[7]
                           "B14  ," &  -- wan_sti[6]
                           "D12  ," &  -- wan_sti[5]
                           "A12  ," &  -- wan_sti[4]
                           "A11  ," &  -- wan_sti[3]
                           "C11 ," &  -- wan_sti[2]
                           "A9 ," &  -- wan_sti[1]
                           "C9)," &  -- wan_sti[0]
    "wan_sto              :(T22   ," &  -- wan_sto[31]
                           "U26   ," &  -- wan_sto[30]
                           "R26   ," &  -- wan_sto[29]
                           "P26  ," &  -- wan_sto[28]
                           "N25  ," &  -- wan_sto[27]
                           "M24  ," &  -- wan_sto[26]
                           "L25  ," &  -- wan_sto[25]
                           "K24  ," &  -- wan_sto[24]
                           "J25  ," &  -- wan_sto[23]
                           "G26  ," &  -- wan_sto[22]
                           "G25  ," &  -- wan_sto[21]
                           "G24  ," &  -- wan_sto[20]
                           "D26  ," &  -- wan_sto[19]
                           "D22  ," &  -- wan_sto[18]
                           "B24  ," &  -- wan_sto[17]
                           "B23  ," &  -- wan_sto[16]
                           "B22  ," &  -- wan_sto[15]
                           "A22  ," &  -- wan_sto[14]
                           "E18  ," &  -- wan_sto[13]
                           "E17  ," &  -- wan_sto[12]
                           "C18  ," &  -- wan_sto[11]
                           "E16  ," &  -- wan_sto[10]
                           "A17  ," &  -- wan_sto[9]
                           "A16  ," &  -- wan_sto[8]
                           "B15  ," &  -- wan_sto[7]
                           "A14  ," &  -- wan_sto[6]
                           "B13  ," &  -- wan_sto[5]
                           "B12  ," &  -- wan_sto[4]
                           "E11  ," &  -- wan_sto[3]
                           "A10  ," &  -- wan_sto[2]
                           "E10  ," &  -- wan_sto[1]
                           "E9 )," &  -- wan_sto[0]
    "s_rst_b              : D24  ," &
    "rstout_b             : C25  ," &
    "sclk_at1             : B26  ," &
    "s_clk                : B25  ," &
    "ode                  : A8 ," &
    "c4ob                 : B8  ," &
    "c8ob                 : A7  ," &
    "c16ob                : B7  ," &
    "fp4ob                : C8  ," &
    "fp8ob                : A6  ," &
    "fp16ob               : D8  ," &
    "loc_sti              :(B6 ," &  -- loc_sti[31]
                           "C7 ," &  -- loc_sti[30]
                           "A5 ," &  -- loc_sti[29]
                           "C5 ," &  -- loc_sti[28]
                           "A4 ," &  -- loc_sti[27]
                           "B4 ," &  -- loc_sti[26]
                           "A3 ," &  -- loc_sti[25]
                           "B3 ," &  -- loc_sti[24]
                           "D5 ," &  -- loc_sti[23]
                           "D4 ," &  -- loc_sti[22]
                           "B2 ," &  -- loc_sti[21]
                           "F4 ," &  -- loc_sti[20]
                           "D3 ," &  -- loc_sti[19]
                           "G5 ," &  -- loc_sti[18]
                           "E3 ," &  -- loc_sti[17]
                           "G4 ," &  -- loc_sti[16]
                           "H5 ," &  -- loc_sti[15]
                           "F3 ," &  -- loc_sti[14]
                           "F2 ," &  -- loc_sti[13]
                           "J5 ," &  -- loc_sti[12]
                           "J4 ," &  -- loc_sti[11]
                           "K5 ," &  -- loc_sti[10]
                           "H2 ," &  -- loc_sti[9]
                           "H1 ," &  -- loc_sti[8]
                           "J2 ," &  -- loc_sti[7]
                           "J1 ," &  -- loc_sti[6]
                           "K3 ," &  -- loc_sti[5]
                           "K1 ," &  -- loc_sti[4]
                           "M4 ," &  -- loc_sti[3]
                           "N4 ," &  -- loc_sti[2]
                           "M3 ," &  -- loc_sti[1]
                           "M1)," &  -- loc_sti[0]
    "loc_sto              :(E8  ," &  -- loc_sto[31]
                           "D7  ," &  -- loc_sto[30]
                           "C6  ," &  -- loc_sto[29]
                           "B5  ," &  -- loc_sto[28]
                           "E7  ," &  -- loc_sto[27]
                           "D6  ," &  -- loc_sto[26]
                           "C4  ," &  -- loc_sto[25]
                           "A2  ," &  -- loc_sto[24]
                           "C3  ," &  -- loc_sto[23]
                           "E4  ," &  -- loc_sto[22]
                           "A1  ," &  -- loc_sto[21]
                           "B1  ," &  -- loc_sto[20]
                           "C2  ," &  -- loc_sto[19]
                           "C1  ," &  -- loc_sto[18]
                           "D2  ," &  -- loc_sto[17]
                           "D1  ," &  -- loc_sto[16]
                           "H4  ," &  -- loc_sto[15]
                           "E1  ," &  -- loc_sto[14]
                           "G3  ," &  -- loc_sto[13]
                           "F1  ," &  -- loc_sto[12]
                           "G2  ," &  -- loc_sto[11]
                           "H3  ," &  -- loc_sto[10]
                           "G1  ," &  -- loc_sto[9]
                           "K4  ," &  -- loc_sto[8]
                           "L5  ," &  -- loc_sto[7]
                           "L4  ," &  -- loc_sto[6]
                           "K2  ," &  -- loc_sto[5]
                           "L3  ," &  -- loc_sto[4]
                           "L2  ," &  -- loc_sto[3]
                           "P4  ," &  -- loc_sto[2]
                           "M2  ," &  -- loc_sto[1]
                           "N3 )," &  -- loc_sto[0]
    "ram_d                :(N2 ," &  -- ram_d[31]
                           "R4 ," &  -- ram_d[30]
                           "N1 ," &  -- ram_d[29]
                           "R5 ," &  -- ram_d[28]
                           "P1 ," &  -- ram_d[27]
                           "T4 ," &  -- ram_d[26]
                           "P2 ," &  -- ram_d[25]
                           "P3 ," &  -- ram_d[24]
                           "R1 ," &  -- ram_d[23]
                           "AB4 ," &  -- ram_d[22]
                           "AC2 ," &  -- ram_d[21]
                           "AD1 ," &  -- ram_d[20]
                           "AC3 ," &  -- ram_d[19]
                           "AD2 ," &  -- ram_d[18]
                           "AC4 ," &  -- ram_d[17]
                           "AE1 ," &  -- ram_d[16]
                           "AE2 ," &  -- ram_d[15]
                           "AD3 ," &  -- ram_d[14]
                           "AC5 ," &  -- ram_d[13]
                           "AF1 ," &  -- ram_d[12]
                           "AF2 ," &  -- ram_d[11]
                           "AC6 ," &  -- ram_d[10]
                           "AE3 ," &  -- ram_d[9]
                           "AF3 ," &  -- ram_d[8]
                           "AD4 ," &  -- ram_d[7]
                           "AB7 ," &  -- ram_d[6]
                           "AE4 ," &  -- ram_d[5]
                           "AF4 ," &  -- ram_d[4]
                           "AD5 ," &  -- ram_d[3]
                           "AC7 ," &  -- ram_d[2]
                           "AE5 ," &  -- ram_d[1]
                           "AB8)," &  -- ram_d[0]
    "ram_a                :(T5  ," &  -- ram_a[22]
                           "R3  ," &  -- ram_a[21]
                           "U4  ," &  -- ram_a[20]
                           "T1  ," &  -- ram_a[19]
                           "U5  ," &  -- ram_a[18]
                           "T2  ," &  -- ram_a[17]
                           "T3  ," &  -- ram_a[16]
                           "U1  ," &  -- ram_a[15]
                           "U2  ," &  -- ram_a[14]
                           "U3  ," &  -- ram_a[13]
                           "V4  ," &  -- ram_a[12]
                           "V1  ," &  -- ram_a[11]
                           "V5  ," &  -- ram_a[10]
                           "V2  ," &  -- ram_a[9]
                           "W4  ," &  -- ram_a[8]
                           "W1  ," &  -- ram_a[7]
                           "W2  ," &  -- ram_a[6]
                           "Y1  ," &  -- ram_a[5]
                           "W5  ," &  -- ram_a[4]
                           "W3  ," &  -- ram_a[3]
                           "Y4 )," &  -- ram_a[2]
    "ram_clk              : Y2 ," &
    "ram_rw3_b            : Y5 ," &
    "ram_rw2_b            : AA1 ," &
    "ram_rw1_b            : Y3 ," &
    "ram_rw0_b            : AA2 ," &
    "ram_oe3_b            : AB1 ," &
    "ram_oe2_b            : AA4 ," &
    "ram_oe1_b            : AB2 ," &
    "ram_oe0_b            : AC1 ," &
    "ram_adsc_b           : AB3 ," &
    "m0_txen              : AD6 ," &
    "m0_txd               :(AC8 ," &  -- m0_txd[3]
                           "AF5 ," &  -- m0_txd[2]
                           "AE6 ," &  -- m0_txd[1]
                           "AD7)," &  -- m0_txd[0]
    "m_mint0              : AF6 ," &
    "m0_txclk             : AB9 ," &
    "m0_col               : AE7 ," &
    "m0_crs               : AC9 ," &
    "m0_rxer              : AD8 ," &
    "m0_rxclk             : AB10 ," &
    "m0_rxdv              : AF7 ," &
    "m0_rxd               :(AF8 ," &  -- m0_rxd[3]
                           "AE8 ," &  -- m0_rxd[2]
                           "AE9 ," &  -- m0_rxd[1]
                           "AD9)," &  -- m0_rxd[0]
    "m_mdio               : AC10 ," &
    "m_mdc                : AF9 ," &
    "refclk               : AB11 ," &
    "m1_txen              : AD10 ," &
    "m1_txd               :(AC11 ," &  -- m1_txd[3]
                           "AE10 ," &  -- m1_txd[2]
                           "AF10 ," &  -- m1_txd[1]
                           "AD11)," &  -- m1_txd[0]
    "m_mint1              : AE11 ," &
    "m1_txclk             : AB12 ," &
    "m1_col               : AF11 ," &
    "m1_crs               : AC12 ," &
    "m1_rxer              : AD12 ," &
    "m1_rxclk             : AC13 ," &
    "m1_rxdv              : AE12 ," &
    "m1_rxd               :(AF12 ," &  -- m1_rxd[3]
                           "AD13 ," &  -- m1_rxd[2]
                           "AE13 ," &  -- m1_rxd[1]
                           "AF13)," &  -- m1_rxd[0]
    "t_mode0              : AC14 ," &
    "t_mode1              : AF14 ," &
    "t_d                  :(AC15 ," &  -- t_d[15]
                           "AE14 ," &  -- t_d[14]
                           "AB15 ," &  -- t_d[13]
                           "AD14 ," &  -- t_d[12]
                           "AF15 ," &  -- t_d[11]
                           "AE15 ," &  -- t_d[10]
                           "AD15 ," &  -- t_d[9]
                           "AF16 ," &  -- t_d[8]
                           "AB16 ," &  -- t_d[7]
                           "AE16 ," &  -- t_d[6]
                           "AC17 ," &  -- t_d[5]
                           "AD16 ," &  -- t_d[4]
                           "AF17 ," &  -- t_d[3]
                           "AE17 ," &  -- t_d[2]
                           "AD17 ," &  -- t_d[1]
                           "AF18)," &  -- t_d[0]
    "jtagrst_b            : AB17 ," &
    "jtagdout             : AE18 ," &
    "jtagmode             : AC18 ," &

-- No Connects
" NC : (D23,AC16)," &
-- PLL1 SUPPLY
" A1VDD : D25," &
-- PLL2 SUPPLY
" A2VDD : AF25," &
-- Periphery Supply
" VDD33 : (AA5,AA22,AB5,AB6,AB13,AB14,AB21,AB22,E5,E6," &
"          E13,E14,E21,E22,F5,F22,M5,N5,N22,P5,P22,R22)," &
-- Core Supply
" VDD18 : (AA3,E2,F24,H23,J3,L1,M26,P23,R2,V3,W22,Y26)," &
-- Ground
" GND : (L11,L12,L13,L14,L15,L16," &
"        M11,M12,M13,M14,M15,M16," &
"        N11,N12,N13,N14,N15,N16," &
"        P11,P12,P13,P14,P15,P16," &
"        R11,R12,R13,R14,R15,R16," &
"        T11,T12,T13,T14,T15,T16,AD25,E23) " ;

   attribute TAP_SCAN_RESET of jtagrst_b: signal is true;
   attribute TAP_SCAN_IN    of jtagdin: signal is true;
   attribute TAP_SCAN_MODE  of jtagmode: signal is true;
   attribute TAP_SCAN_OUT   of jtagdout: signal is true;
   attribute TAP_SCAN_CLOCK of jtagclk: signal is (1.00e+07,BOTH);


    attribute COMPLIANCE_PATTERNS of mt90880 : entity is
        "(pci_rst_n,iddq,s_rst_b,t_mode0,t_mode1) (10111)";
   attribute INSTRUCTION_LENGTH of mt90880: entity is 16;

   attribute INSTRUCTION_OPCODE of mt90880: entity is
      "IDCODE       (1111111111111110)," &
      "BYPASS       (1111111111111111)," &
      "EXTEST       (0000000000000000,1111111111101000)," &
      "SAMPLE       (1111111111111000)," &
      "HIGHZ        (1111111111001111)," &
      "CLAMP        (1111111111101111) " ;

attribute INSTRUCTION_CAPTURE of mt90880:entity is "XXXXXXXXXXXXXX01";

   attribute IDCODE_REGISTER of mt90880: entity is
      "0001"             & -- version
      "0000100010000000" & -- part number
      "00010100101"      & -- manufacturer's identity
      "1";                   -- required by 1149.1

   attribute REGISTER_ACCESS of mt90880: entity is
      "BYPASS       (HIGHZ,CLAMP) " ;


    --Boundary scan definition
    attribute BOUNDARY_LENGTH of mt90880: entity is 583;

    attribute BOUNDARY_REGISTER of mt90880: entity is
-- num  cell  port function  safe  [ccell disval  rslt]
"  582  (BC_2,*,control,1   )               ,"&
"581  (BC_2,pci_inta_n,output3,X,  582,1 ,Z   ),"&
"580  (BC_2,*,control,1   )               ,"&
"579  (LV_BC_7,pci_clk   ,bidir ,X,  580,1 ,Z   ),"&
"578  (BC_2,*,control,1   )               ,"&
"577  (LV_BC_7,pci_gnt_n ,bidir ,X,  578,1 ,Z   ),"&
"576  (BC_2,*,control,1   )               ,"&
"575  (BC_2,pci_req_n ,output3,X,  576,1 ,Z   ),"&
"574  (BC_2,*,control,1   )               ,"&
"573  (LV_BC_7,pci_ad(31),bidir ,X,  574,1 ,Z   ),"&
"572  (BC_2,*,control,1   )               ,"&
"571  (LV_BC_7,pci_ad(30),bidir ,X,  572,1 ,Z   ),"&
"570  (BC_2,*,control,1   )               ,"&
"569  (LV_BC_7,pci_ad(29),bidir ,X,  570,1 ,Z   ),"&
"568  (BC_2,*,control,1   )               ,"&
"567  (LV_BC_7,pci_ad(28),bidir ,X,  568,1 ,Z   ),"&
"566  (BC_2,*,control,1   )               ,"&
"565  (LV_BC_7,pci_ad(27),bidir ,X,  566,1 ,Z   ),"&
"564  (BC_2,*,control,1   )               ,"&
"563  (LV_BC_7,pci_ad(26),bidir ,X,  564,1 ,Z   ),"&
"562  (BC_2,*,control,1   )               ,"&
"561  (LV_BC_7,pci_ad(25),bidir ,X,  562,1 ,Z   ),"&
"560  (BC_2,*,control,1   )               ,"&
"559  (LV_BC_7,pci_ad(24),bidir ,X,  560,1 ,Z   ),"&
"558  (BC_2,*,control,1   )               ,"&
"557  (LV_BC_7,pci_cbe_n(3) ,bidir ,X,  558,1 ,Z   ),"&
"556  (BC_2,*,control,1   )               ,"&
"555  (LV_BC_7,pci_idsel ,bidir ,X,  556,1 ,Z   ),"&
"554  (BC_2,*,control,1   )               ,"&
"553  (LV_BC_7,pci_ad(23),bidir ,X,  554,1 ,Z   ),"&
"552  (BC_2,*,control,1   )               ,"&
"551  (LV_BC_7,pci_ad(22),bidir ,X,  552,1 ,Z   ),"&
"550  (BC_2,*,control,1   )               ,"&
"549  (LV_BC_7,pci_ad(21),bidir ,X,  550,1 ,Z   ),"&
"548  (BC_2,*,control,1   )               ,"&
"547  (LV_BC_7,pci_ad(20),bidir ,X,  548,1 ,Z   ),"&
"546  (BC_2,*,control,1   )               ,"&
"545  (LV_BC_7,pci_ad(19),bidir ,X,  546,1 ,Z   ),"&
"544  (BC_2,*,control,1   )               ,"&
"543  (LV_BC_7,pci_ad(18),bidir ,X,  544,1 ,Z   ),"&
"542  (BC_2,*,control,1   )               ,"&
"541  (LV_BC_7,pci_ad(17),bidir ,X,  542,1 ,Z   ),"&
"540  (BC_2,*,control,1   )               ,"&
"539  (LV_BC_7,pci_ad(16),bidir ,X,  540,1 ,Z   ),"&
"538  (BC_2,*,control,1   )               ,"&
"537  (LV_BC_7,pci_cbe_n(2) ,bidir ,X,  538,1 ,Z   ),"&
"536  (BC_2,*,control,1   )               ,"&
"535  (LV_BC_7,pci_frame_n,bidir ,X,  536,1 ,Z   ),"&
"534  (BC_2,*,control,1   )               ,"&
"533  (LV_BC_7,pci_irdy_n,bidir ,X,  534,1 ,Z   ),"&
"532  (BC_2,*,control,1   )               ,"&
"531  (LV_BC_7,pci_trdy_n,bidir ,X,  532,1 ,Z   ),"&
"530  (BC_2,*,control,1   )               ,"&
"529  (LV_BC_7,pci_devsel_n ,bidir ,X,  530,1 ,Z   ),"&
"528  (BC_2,*,control,1   )               ,"&
"527  (LV_BC_7,pci_stop_n,bidir ,X,  528,1 ,Z   ),"&
"526  (BC_2,*,control,1   )               ,"&
"525  (LV_BC_7,pci_lock_n,bidir ,X,  526,1 ,Z   ),"&
"524  (BC_2,*,control,1   )               ,"&
"523  (LV_BC_7,pci_perr_n,bidir ,X,  524,1 ,Z   ),"&
"522  (BC_2,*,control,1   )               ,"&
"521  (BC_2,pci_serr_n,output3,X,  522,1 ,Z   ),"&
"520  (BC_2,*,control,1   )               ,"&
"519  (LV_BC_7,pci_par   ,bidir ,X,  520,1 ,Z   ),"&
"518  (BC_2,*,control,1   )               ,"&
"517  (LV_BC_7,pci_cbe_n(1) ,bidir ,X,  518,1 ,Z   ),"&
"516  (BC_2,*,control,1   )               ,"&
"515  (LV_BC_7,pci_ad(15),bidir ,X,  516,1 ,Z   ),"&
"514  (BC_2,*,control,1   )               ,"&
"513  (LV_BC_7,pci_ad(14),bidir ,X,  514,1 ,Z   ),"&
"512  (BC_2,*,control,1   )               ,"&
"511  (LV_BC_7,pci_ad(13),bidir ,X,  512,1 ,Z   ),"&
"510  (BC_2,*,control,1   )               ,"&
"509  (LV_BC_7,pci_ad(12),bidir ,X,  510,1 ,Z   ),"&
"508  (BC_2,*,control,1   )               ,"&
"507  (LV_BC_7,pci_ad(11),bidir ,X,  508,1 ,Z   ),"&
"506  (BC_2,*,control,1   )               ,"&
"505  (LV_BC_7,pci_ad(10),bidir ,X,  506,1 ,Z   ),"&
"504  (BC_2,*,control,1   )               ,"&
"503  (LV_BC_7,pci_ad(9) ,bidir ,X,  504,1 ,Z   ),"&
"502  (BC_2,*,control,1   )               ,"&
"501  (BC_2,wan_clko  ,output3,X,  502,1 ,Z   ),"&
"500  (BC_2,*,control,1   )               ,"&
"499  (LV_BC_7,pci_ad(8) ,bidir ,X,  500,1 ,Z   ),"&
"498  (BC_2,*,control,1   )               ,"&
"497  (BC_2,wan_frmo  ,output3,X,  498,1 ,Z   ),"&
"496  (BC_2,*,control,1   )               ,"&
"495  (LV_BC_7,pci_m66en ,bidir ,X,  496,1 ,Z   ),"&
"494  (BC_2,wan_clki(31) ,input ,X   )               ,"&
"493  (BC_2,*,control,1   )               ,"&
"492  (LV_BC_7,pci_cbe_n(0) ,bidir ,X,  493,1 ,Z   ),"&
"491  (BC_2,wan_frmi(31) ,input ,X   )               ,"&
"490  (BC_2,*,control,1   )               ,"&
"489  (LV_BC_7,pci_ad(7) ,bidir ,X,  490,1 ,Z   ),"&
"488  (BC_2,wan_sti(31),input ,X   )               ,"&
"487  (BC_2,*,control,1   )               ,"&
"486  (LV_BC_7,pci_ad(6) ,bidir ,X,  487,1 ,Z   ),"&
"485  (BC_2,*,control,1   )               ,"&
"484  (LV_BC_7,pci_ad(5) ,bidir ,X,  485,1 ,Z   ),"&
"483  (BC_2,*,control,1   )               ,"&
"482  (BC_2,wan_sto(31),output3,X,  483,1 ,Z   ),"&

"481  (BC_2,wan_clki(30) ,input ,X   )               ,"&
"480  (BC_2,*,control,1   )               ,"&
"479  (LV_BC_7,pci_ad(4) ,bidir ,X,  480,1 ,Z   ),"&
"478  (BC_2,wan_frmi(30) ,input ,X   )               ,"&
"477  (BC_2,wan_sti(30),input ,X   )               ,"&
"476  (BC_2,*,control,1   )               ,"&
"475  (BC_2,wan_sto(30),output3,X,  476,1 ,Z   ),"&
"474  (BC_2,*,control,1   )               ,"&
"473  (LV_BC_7,pci_ad(3) ,bidir ,X,  474,1 ,Z   ),"&
"472  (BC_2,*,control,1   )               ,"&
"471  (LV_BC_7,pci_ad(2) ,bidir ,X,  472,1 ,Z   ),"&
"470  (BC_2,*,control,1   )               ,"&
"469  (LV_BC_7,pci_ad(1) ,bidir ,X,  470,1 ,Z   ),"&
"468  (BC_2,*,control,1   )               ,"&
"467  (LV_BC_7,pci_ad(0) ,bidir ,X,  468,1 ,Z   ),"&
"466  (BC_2,wan_clki(29) ,input ,X   )               ,"&
"465  (BC_2,wan_frmi(29) ,input ,X   )               ,"&
"464  (BC_2,wan_sti(29),input ,X   )               ,"&
"463  (BC_2,*,control,1   )               ,"&
"462  (BC_2,wan_sto(29),output3,X,  463,1 ,Z   ),"&
"461  (BC_2,wan_clki(28) ,input ,X   )               ,"&
"460  (BC_2,wan_frmi(28) ,input ,X   )               ,"&
"459  (BC_2,wan_sti(28),input ,X   )               ,"&
"458  (BC_2,*,control,1   )               ,"&
"457  (BC_2,wan_sto(28),output3,X,  458,1 ,Z   ),"&
"456  (BC_2,wan_clki(27) ,input ,X   )               ,"&
"455  (BC_2,wan_frmi(27) ,input ,X   )               ,"&
"454  (BC_2,wan_sti(27),input ,X   )               ,"&
"453  (BC_2,*,control,1   )               ,"&
"452  (BC_2,wan_sto(27),output3,X,  453,1 ,Z   ),"&
"451  (BC_2,wan_clki(26) ,input ,X   )               ,"&
"450  (BC_2,wan_frmi(26) ,input ,X   )               ,"&
"449  (BC_2,wan_sti(26),input ,X   )               ,"&
"448  (BC_2,*,control,1   )               ,"&
"447  (BC_2,wan_sto(26),output3,X,  448,1 ,Z   ),"&
"446  (BC_2,wan_clki(25) ,input ,X   )               ,"&
"445  (BC_2,wan_frmi(25) ,input ,X   )               ,"&
"444  (BC_2,wan_sti(25),input ,X   )               ,"&
"443  (BC_2,*,control,1   )               ,"&
"442  (BC_2,wan_sto(25),output3,X,  443,1 ,Z   ),"&
"441  (BC_2,wan_clki(24) ,input ,X   )               ,"&
"440  (BC_2,wan_frmi(24) ,input ,X   )               ,"&
"439  (BC_2,wan_sti(24),input ,X   )               ,"&
"438  (BC_2,*,control,1   )               ,"&
"437  (BC_2,wan_sto(24),output3,X,  438,1 ,Z   ),"&
"436  (BC_2,wan_clki(23) ,input ,X   )               ,"&
"435  (BC_2,wan_frmi(23) ,input ,X   )               ,"&
"434  (BC_2,wan_sti(23),input ,X   )               ,"&
"433  (BC_2,*,control,1   )               ,"&
"432  (BC_2,wan_sto(23),output3,X,  433,1 ,Z   ),"&
"431  (BC_2,wan_clki(22) ,input ,X   )               ,"&
"430  (BC_2,wan_frmi(22) ,input ,X   )               ,"&
"429  (BC_2,wan_sti(22),input ,X   )               ,"&
"428  (BC_2,*,control,1   )               ,"&
"427  (BC_2,wan_sto(22),output3,X,  428,1 ,Z   ),"&
"426  (BC_2,wan_clki(21) ,input ,X   )               ,"&
"425  (BC_2,wan_frmi(21) ,input ,X   )               ,"&
"424  (BC_2,wan_sti(21),input ,X   )               ,"&
"423  (BC_2,*,control,1   )               ,"&
"422  (BC_2,wan_sto(21),output3,X,  423,1 ,Z   ),"&
"421  (BC_2,wan_clki(20) ,input ,X   )               ,"&
"420  (BC_2,wan_frmi(20) ,input ,X   )               ,"&
"419  (BC_2,*,control,1   )               ,"&
"418  (BC_2,wan_sto(20),output3,X,  419,1 ,Z   ),"&
"417  (BC_2,wan_sti(20),input ,X   )               ,"&
"416  (BC_2,wan_clki(19) ,input ,X   )               ,"&
"415  (BC_2,wan_frmi(19) ,input ,X   )               ,"&
"414  (BC_2,wan_sti(19),input ,X   )               ,"&
"413  (BC_2,*,control,1   )               ,"&
"412  (BC_2,wan_sto(19),output3,X,  413,1 ,Z   ),"&
"411  (BC_2,wan_clki(18) ,input ,X   )               ,"&
"410  (BC_2,wan_frmi(18) ,input ,X   )               ,"&
"409  (BC_2,*,control,1   )               ,"&
"408  (BC_2,rstout_b  ,output3,X,  409,1 ,Z   ),"&
"407  (BC_4,s_clk ,clock ,X   )               ,"&
"406  (BC_2,wan_sti(18),input ,X   )               ,"&
"405  (BC_2,*,control,1   )               ,"&
"404  (BC_2,wan_sto(18),output3,X,  405,1 ,Z   ),"&
"403  (BC_2,wan_clki(17) ,input ,X   )               ,"&
"402  (BC_2,wan_frmi(17) ,input ,X   )               ,"&
"401  (BC_2,wan_sti(17),input ,X   )               ,"&
"400  (BC_2,*,control,1   )               ,"&
"399  (BC_2,wan_sto(17),output3,X,  400,1 ,Z   ),"&
"398  (BC_2,wan_clki(16) ,input ,X   )               ,"&
"397  (BC_2,wan_frmi(16) ,input ,X   )               ,"&
"396  (BC_2,wan_sti(16),input ,X   )               ,"&
"395  (BC_2,*,control,1   )               ,"&
"394  (BC_2,wan_sto(16),output3,X,  395,1 ,Z   ),"&
"393  (BC_2,wan_clki(15) ,input ,X   )               ,"&
"392  (BC_2,wan_frmi(15) ,input ,X   )               ,"&
"391  (BC_2,wan_sti(15),input ,X   )               ,"&
"390  (BC_2,*,control,1   )               ,"&
"389  (BC_2,wan_sto(15),output3,X,  390,1 ,Z   ),"&
"388  (BC_2,wan_clki(14) ,input ,X   )               ,"&
"387  (BC_2,wan_frmi(14) ,input ,X   )               ,"&
"386  (BC_2,wan_sti(14),input ,X   )               ,"&
"385  (BC_2,*,control,1   )               ,"&
"384  (BC_2,wan_sto(14),output3,X,  385,1 ,Z   ),"&
"383  (BC_2,wan_clki(13) ,input ,X   )               ,"&
"382  (BC_2,wan_frmi(13) ,input ,X   )               ,"&
"381  (BC_2,wan_sti(13),input ,X   )               ,"&
"380  (BC_2,*,control,1   )               ,"&
"379  (BC_2,wan_sto(13),output3,X,  380,1 ,Z   ),"&
"378  (BC_2,wan_clki(12) ,input ,X   )               ,"&
"377  (BC_2,wan_frmi(12) ,input ,X   )               ,"&
"376  (BC_2,wan_sti(12),input ,X   )               ,"&
"375  (BC_2,*,control,1   )               ,"&
"374  (BC_2,wan_sto(12),output3,X,  375,1 ,Z   ),"&
"373  (BC_2,wan_clki(11) ,input ,X   )               ,"&
"372  (BC_2,wan_frmi(11) ,input ,X   )               ,"&
"371  (BC_2,wan_sti(11),input ,X   )               ,"&
"370  (BC_2,*,control,1   )               ,"&
"369  (BC_2,wan_sto(11),output3,X,  370,1 ,Z   ),"&
"368  (BC_2,wan_clki(10) ,input ,X   )               ,"&
"367  (BC_2,wan_frmi(10) ,input ,X   )               ,"&
"366  (BC_2,wan_sti(10),input ,X   )               ,"&
"365  (BC_2,*,control,1   )               ,"&
"364  (BC_2,wan_sto(10),output3,X,  365,1 ,Z   ),"&
"363  (BC_2,wan_clki(9),input ,X   )               ,"&
"362  (BC_2,wan_frmi(9),input ,X   )               ,"&
"361  (BC_2,wan_sti(9),input ,X   )               ,"&
"360  (BC_2,*,control,1   )               ,"&
"359  (BC_2,wan_sto(9),output3,X,  360,1 ,Z   ),"&
"358  (BC_2,wan_clki(8),input ,X   )               ,"&
"357  (BC_2,wan_frmi(8),input ,X   )               ,"&
"356  (BC_2,wan_sti(8),input ,X   )               ,"&
"355  (BC_2,*,control,1   )               ,"&
"354  (BC_2,wan_sto(8),output3,X,  355,1 ,Z   ),"&
"353  (BC_2,wan_clki(7),input ,X   )               ,"&
"352  (BC_2,wan_frmi(7),input ,X   )               ,"&
"351  (BC_2,wan_sti(7),input ,X   )               ,"&
"350  (BC_2,*,control,1   )               ,"&
"349  (BC_2,wan_sto(7),output3,X,  350,1 ,Z   ),"&
"348  (BC_2,wan_clki(6),input ,X   )               ,"&
"347  (BC_2,wan_frmi(6),input ,X   )               ,"&
"346  (BC_2,wan_sti(6),input ,X   )               ,"&
"345  (BC_2,*,control,1   )               ,"&
"344  (BC_2,wan_sto(6),output3,X,  345,1 ,Z   ),"&
"343  (BC_2,wan_clki(5),input ,X   )               ,"&
"342  (BC_2,wan_frmi(5),input ,X   )               ,"&
"341  (BC_2,wan_sti(5),input ,X   )               ,"&
"340  (BC_2,*,control,1   )               ,"&
"339  (BC_2,wan_sto(5),output3,X,  340,1 ,Z   ),"&
"338  (BC_2,wan_clki(4),input ,X   )               ,"&
"337  (BC_2,wan_frmi(4),input ,X   )               ,"&
"336  (BC_2,wan_sti(4),input ,X   )               ,"&
"335  (BC_2,*,control,1   )               ,"&
"334  (BC_2,wan_sto(4),output3,X,  335,1 ,Z   ),"&
"333  (BC_2,wan_clki(3),input ,X   )               ,"&
"332  (BC_2,wan_frmi(3),input ,X   )               ,"&
"331  (BC_2,wan_sti(3),input ,X   )               ,"&
"330  (BC_2,*,control,1   )               ,"&
"329  (BC_2,wan_sto(3),output3,X,  330,1 ,Z   ),"&
"328  (BC_2,wan_clki(2),input ,X   )               ,"&
"327  (BC_2,wan_frmi(2),input ,X   )               ,"&
"326  (BC_2,wan_sti(2),input ,X   )               ,"&
"325  (BC_2,*,control,1   )               ,"&
"324  (BC_2,wan_sto(2),output3,X,  325,1 ,Z   ),"&
"323  (BC_2,wan_clki(1),input ,X   )               ,"&
"322  (BC_2,wan_frmi(1),input ,X   )               ,"&
"321  (BC_2,wan_sti(1),input ,X   )               ,"&
"320  (BC_2,*,control,1   )               ,"&
"319  (BC_2,wan_sto(1),output3,X,  320,1 ,Z   ),"&
"318  (BC_2,wan_clki(0),input ,X   )               ,"&
"317  (BC_2,wan_frmi(0),input ,X   )               ,"&
"316  (BC_2,wan_sti(0),input ,X   )               ,"&
"315  (BC_2,*,control,1   )               ,"&
"314  (BC_2,wan_sto(0),output3,X,  315,1 ,Z   ),"&
"313  (BC_2,ode ,input ,X   )               ,"&
"312  (BC_2,*,control,1   )               ,"&
"311  (BC_2,c4ob,output3,X,  312,1 ,Z   ),"&
"310  (BC_2,*,control,1   )               ,"&
"309  (BC_2,c8ob,output3,X,  310,1 ,Z   ),"&
"308  (BC_2,*,control,1   )               ,"&
"307  (BC_2,c16ob ,output3,X,  308,1 ,Z   ),"&
"306  (BC_2,*,control,1   )               ,"&
"305  (BC_2,fp4ob ,output3,X,  306,1 ,Z   ),"&
"304  (BC_2,*,control,1   )               ,"&
"303  (BC_2,fp8ob ,output3,X,  304,1 ,Z   ),"&
"302  (BC_2,*,control,1   )               ,"&
"301  (BC_2,fp16ob,output3,X,  302,1 ,Z   ),"&
"300  (BC_2,loc_sti(31),input ,X   )               ,"&
"299  (BC_2,*,control,1   )               ,"&
"298  (BC_2,loc_sto(31),output3,X,  299,1 ,Z   ),"&
"297  (BC_2,loc_sti(30),input ,X   )               ,"&
"296  (BC_2,*,control,1   )               ,"&
"295  (BC_2,loc_sto(30),output3,X,  296,1 ,Z   ),"&
"294  (BC_2,loc_sti(29),input ,X   )               ,"&
"293  (BC_2,*,control,1   )               ,"&
"292  (BC_2,loc_sto(29),output3,X,  293,1 ,Z   ),"&
"291  (BC_2,loc_sti(28),input ,X   )               ,"&
"290  (BC_2,*,control,1   )               ,"&
"289  (BC_2,loc_sto(28),output3,X,  290,1 ,Z   ),"&
"288  (BC_2,loc_sti(27),input ,X   )               ,"&
"287  (BC_2,*,control,1   )               ,"&
"286  (BC_2,loc_sto(27),output3,X,  287,1 ,Z   ),"&
"285  (BC_2,loc_sti(26),input ,X   )               ,"&
"284  (BC_2,*,control,1   )               ,"&
"283  (BC_2,loc_sto(26),output3,X,  284,1 ,Z   ),"&
"282  (BC_2,loc_sti(25),input ,X   )               ,"&
"281  (BC_2,*,control,1   )               ,"&
"280  (BC_2,loc_sto(25),output3,X,  281,1 ,Z   ),"&
"279  (BC_2,loc_sti(24),input ,X   )               ,"&
"278  (BC_2,*,control,1   )               ,"&
"277  (BC_2,loc_sto(24),output3,X,  278,1 ,Z   ),"&
"276  (BC_2,loc_sti(23),input ,X   )               ,"&
"275  (BC_2,*,control,1   )               ,"&
"274  (BC_2,loc_sto(23),output3,X,  275,1 ,Z   ),"&
"273  (BC_2,loc_sti(22),input ,X   )               ,"&
"272  (BC_2,*,control,1   )               ,"&
"271  (BC_2,loc_sto(22),output3,X,  272,1 ,Z   ),"&
"270  (BC_2,loc_sti(21),input ,X   )               ,"&
"269  (BC_2,*,control,1   )               ,"&
"268  (BC_2,loc_sto(21),output3,X,  269,1 ,Z   ),"&
"267  (BC_2,loc_sti(20),input ,X   )               ,"&
"266  (BC_2,*,control,1   )               ,"&
"265  (BC_2,loc_sto(20),output3,X,  266,1 ,Z   ),"&
"264  (BC_2,loc_sti(19),input ,X   )               ,"&
"263  (BC_2,*,control,1   )               ,"&
"262  (BC_2,loc_sto(19),output3,X,  263,1 ,Z   ),"&
"261  (BC_2,loc_sti(18),input ,X   )               ,"&
"260  (BC_2,*,control,1   )               ,"&
"259  (BC_2,loc_sto(18),output3,X,  260,1 ,Z   ),"&
"258  (BC_2,loc_sti(17),input ,X   )               ,"&
"257  (BC_2,*,control,1   )               ,"&
"256  (BC_2,loc_sto(17),output3,X,  257,1 ,Z   ),"&
"255  (BC_2,loc_sti(16),input ,X   )               ,"&
"254  (BC_2,*,control,1   )               ,"&
"253  (BC_2,loc_sto(16),output3,X,  254,1 ,Z   ),"&
"252  (BC_2,loc_sti(15),input ,X   )               ,"&
"251  (BC_2,*,control,1   )               ,"&
"250  (BC_2,loc_sto(15),output3,X,  251,1 ,Z   ),"&
"249  (BC_2,loc_sti(14),input ,X   )               ,"&
"248  (BC_2,*,control,1   )               ,"&
"247  (BC_2,loc_sto(14),output3,X,  248,1 ,Z   ),"&
"246  (BC_2,loc_sti(13),input ,X   )               ,"&
"245  (BC_2,*,control,1   )               ,"&
"244  (BC_2,loc_sto(13),output3,X,  245,1 ,Z   ),"&
"243  (BC_2,loc_sti(12),input ,X   )               ,"&
"242  (BC_2,*,control,1   )               ,"&
"241  (BC_2,loc_sto(12),output3,X,  242,1 ,Z   ),"&
"240  (BC_2,loc_sti(11),input ,X   )               ,"&
"239  (BC_2,*,control,1   )               ,"&
"238  (BC_2,loc_sto(11),output3,X,  239,1 ,Z   ),"&
"237  (BC_2,loc_sti(10),input ,X   )               ,"&
"236  (BC_2,*,control,1   )               ,"&
"235  (BC_2,loc_sto(10),output3,X,  236,1 ,Z   ),"&
"234  (BC_2,loc_sti(9),input ,X   )               ,"&
"233  (BC_2,*,control,1   )               ,"&
"232  (BC_2,loc_sto(9),output3,X,  233,1 ,Z   ),"&
"231  (BC_2,loc_sti(8),input ,X   )               ,"&
"230  (BC_2,*,control,1   )               ,"&
"229  (BC_2,loc_sto(8),output3,X,  230,1 ,Z   ),"&
"228  (BC_2,loc_sti(7),input ,X   )               ,"&
"227  (BC_2,*,control,1   )               ,"&
"226  (BC_2,loc_sto(7),output3,X,  227,1 ,Z   ),"&
"225  (BC_2,loc_sti(6),input ,X   )               ,"&
"224  (BC_2,*,control,1   )               ,"&
"223  (BC_2,loc_sto(6),output3,X,  224,1 ,Z   ),"&
"222  (BC_2,loc_sti(5),input ,X   )               ,"&
"221  (BC_2,*,control,1   )               ,"&
"220  (BC_2,loc_sto(5),output3,X,  221,1 ,Z   ),"&
"219  (BC_2,loc_sti(4),input ,X   )               ,"&
"218  (BC_2,*,control,1   )               ,"&
"217  (BC_2,loc_sto(4),output3,X,  218,1 ,Z   ),"&
"216  (BC_2,loc_sti(3),input ,X   )               ,"&
"215  (BC_2,*,control,1   )               ,"&
"214  (BC_2,loc_sto(3),output3,X,  215,1 ,Z   ),"&
"213  (BC_2,loc_sti(2),input ,X   )               ,"&
"212  (BC_2,*,control,1   )               ,"&
"211  (BC_2,loc_sto(2),output3,X,  212,1 ,Z   ),"&
"210  (BC_2,loc_sti(1),input ,X   )               ,"&
"209  (BC_2,*,control,1   )               ,"&
"208  (BC_2,loc_sto(1),output3,X,  209,1 ,Z   ),"&
"207  (BC_2,loc_sti(0),input ,X   )               ,"&
"206  (BC_2,*,control,1   )               ,"&
"205  (BC_2,loc_sto(0),output3,X,  206,1 ,Z   ),"&
"204  (BC_2,*,control,1   )               ,"&
"203  (LV_BC_7,ram_d(31) ,bidir ,X,  204,1 ,Z   ),"&
"202  (BC_2,*,control,1   )               ,"&
"201  (LV_BC_7,ram_d(30) ,bidir ,X,  202,1 ,Z   ),"&
"200  (BC_2,*,control,1   )               ,"&
"199  (LV_BC_7,ram_d(29) ,bidir ,X,  200,1 ,Z   ),"&
"198  (BC_2,*,control,1   )               ,"&
"197  (LV_BC_7,ram_d(28) ,bidir ,X,  198,1 ,Z   ),"&
"196  (BC_2,*,control,1   )               ,"&
"195  (LV_BC_7,ram_d(27) ,bidir ,X,  196,1 ,Z   ),"&
"194  (BC_2,*,control,1   )               ,"&
"193  (LV_BC_7,ram_d(26) ,bidir ,X,  194,1 ,Z   ),"&
"192  (BC_2,*,control,1   )               ,"&
"191  (LV_BC_7,ram_d(25) ,bidir ,X,  192,1 ,Z   ),"&
"190  (BC_2,*,control,1   )               ,"&
"189  (LV_BC_7,ram_d(24) ,bidir ,X,  190,1 ,Z   ),"&
"188  (BC_2,*,control,1   )               ,"&
"187  (LV_BC_7,ram_d(23) ,bidir ,X,  188,1 ,Z   ),"&
"186  (BC_2,*,control,1   )               ,"&
"185  (BC_2,ram_a(22) ,output3,X,  186,1 ,Z   ),"&
"184  (BC_2,*,control,1   )               ,"&
"183  (BC_2,ram_a(21) ,output3,X,  184,1 ,Z   ),"&
"182  (BC_2,*,control,1   )               ,"&
"181  (BC_2,ram_a(20) ,output3,X,  182,1 ,Z   ),"&
"180  (BC_2,*,control,1   )               ,"&
"179  (BC_2,ram_a(19) ,output3,X,  180,1 ,Z   ),"&
"178  (BC_2,*,control,1   )               ,"&
"177  (BC_2,ram_a(18) ,output3,X,  178,1 ,Z   ),"&
"176  (BC_2,*,control,1   )               ,"&
"175  (BC_2,ram_a(17) ,output3,X,  176,1 ,Z   ),"&
"174  (BC_2,*,control,1   )               ,"&
"173  (BC_2,ram_a(16) ,output3,X,  174,1 ,Z   ),"&
"172  (BC_2,*,control,1   )               ,"&
"171  (BC_2,ram_a(15) ,output3,X,  172,1 ,Z   ),"&
"170  (BC_2,*,control,1   )               ,"&
"169  (BC_2,ram_a(14) ,output3,X,  170,1 ,Z   ),"&
"168  (BC_2,*,control,1   )               ,"&
"167  (BC_2,ram_a(13) ,output3,X,  168,1 ,Z   ),"&
"166  (BC_2,*,control,1   )               ,"&
"165  (BC_2,ram_a(12) ,output3,X,  166,1 ,Z   ),"&
"164  (BC_2,*,control,1   )               ,"&
"163  (BC_2,ram_a(11) ,output3,X,  164,1 ,Z   ),"&
"162  (BC_2,*,control,1   )               ,"&
"161  (BC_2,ram_a(10) ,output3,X,  162,1 ,Z   ),"&
"160  (BC_2,*,control,1   )               ,"&
"159  (BC_2,ram_a(9)  ,output3,X,  160,1 ,Z   ),"&
"158  (BC_2,*,control,1   )               ,"&
"157  (BC_2,ram_a(8)  ,output3,X,  158,1 ,Z   ),"&
"156  (BC_2,*,control,1   )               ,"&
"155  (BC_2,ram_a(7)  ,output3,X,  156,1 ,Z   ),"&
"154  (BC_2,*,control,1   )               ,"&
"153  (BC_2,ram_a(6)  ,output3,X,  154,1 ,Z   ),"&
"152  (BC_2,*,control,1   )               ,"&
"151  (BC_2,ram_a(5)  ,output3,X,  152,1 ,Z   ),"&
"150  (BC_2,*,control,1   )               ,"&
"149  (BC_2,ram_a(4)  ,output3,X,  150,1 ,Z   ),"&
"148  (BC_2,*,control,1   )               ,"&
"147  (BC_2,ram_a(3)  ,output3,X,  148,1 ,Z   ),"&
"146  (BC_2,*,control,1   )               ,"&
"145  (BC_2,ram_a(2)  ,output3,X,  146,1 ,Z   ),"&
"144  (BC_2,*,control,1   )               ,"&
"143  (BC_2,ram_clk   ,output3,X,  144,1 ,Z   ),"&
"142  (BC_2,*,control,1   )               ,"&
"141  (BC_2,ram_rw3_b ,output3,X,  142,1 ,Z   ),"&
"140  (BC_2,*,control,1   )               ,"&
"139  (BC_2,ram_rw2_b ,output3,X,  140,1 ,Z   ),"&
"138  (BC_2,*,control,1   )               ,"&
"137  (BC_2,ram_rw1_b ,output3,X,  138,1 ,Z   ),"&
"136  (BC_2,*,control,1   )               ,"&
"135  (BC_2,ram_rw0_b ,output3,X,  136,1 ,Z   ),"&
"134  (BC_2,*,control,1   )               ,"&
"133  (BC_2,ram_oe3_b ,output3,X,  134,1 ,Z   ),"&
"132  (BC_2,*,control,1   )               ,"&
"131  (BC_2,ram_oe2_b ,output3,X,  132,1 ,Z   ),"&
"130  (BC_2,*,control,1   )               ,"&
"129  (BC_2,ram_oe1_b ,output3,X,  130,1 ,Z   ),"&
"128  (BC_2,*,control,1   )               ,"&
"127  (BC_2,ram_oe0_b ,output3,X,  128,1 ,Z   ),"&
"126  (BC_2,*,control,1   )               ,"&
"125  (BC_2,ram_adsc_b,output3,X,  126,1 ,Z   ),"&
"124  (BC_2,*,control,1   )               ,"&
"123  (LV_BC_7,ram_d(22) ,bidir ,X,  124,1 ,Z   ),"&
"122  (BC_2,*,control,1   )               ,"&
"121  (LV_BC_7,ram_d(21) ,bidir ,X,  122,1 ,Z   ),"&
"120  (BC_2,*,control,1   )               ,"&
"119  (LV_BC_7,ram_d(20) ,bidir ,X,  120,1 ,Z   ),"&
"118  (BC_2,*,control,1   )               ,"&
"117  (LV_BC_7,ram_d(19) ,bidir ,X,  118,1 ,Z   ),"&
"116  (BC_2,*,control,1   )               ,"&
"115  (LV_BC_7,ram_d(18) ,bidir ,X,  116,1 ,Z   ),"&
"114  (BC_2,*,control,1   )               ,"&
"113  (LV_BC_7,ram_d(17) ,bidir ,X,  114,1 ,Z   ),"&
"112  (BC_2,*,control,1   )               ,"&
"111  (LV_BC_7,ram_d(16) ,bidir ,X,  112,1 ,Z   ),"&
"110  (BC_2,*,control,1   )               ,"&
"109  (LV_BC_7,ram_d(15) ,bidir ,X,  110,1 ,Z   ),"&
"108  (BC_2,*,control,1   )               ,"&
"107  (LV_BC_7,ram_d(14) ,bidir ,X,  108,1 ,Z   ),"&
"106  (BC_2,*,control,1   )               ,"&
"105  (LV_BC_7,ram_d(13) ,bidir ,X,  106,1 ,Z   ),"&
"104  (BC_2,*,control,1   )               ,"&
"103  (LV_BC_7,ram_d(12) ,bidir ,X,  104,1 ,Z   ),"&
"102  (BC_2,*,control,1   )               ,"&
"101  (LV_BC_7,ram_d(11) ,bidir ,X,  102,1 ,Z   ),"&
"100  (BC_2,*,control,1   )               ,"&
"99   (LV_BC_7,ram_d(10) ,bidir ,X,  100,1 ,Z   ),"&
"98   (BC_2,*,control,1   )               ,"&
"97   (LV_BC_7,ram_d(9)  ,bidir ,X,  98 ,1 ,Z   ),"&
"96   (BC_2,*,control,1   )               ,"&
"95   (LV_BC_7,ram_d(8)  ,bidir ,X,  96 ,1 ,Z   ),"&
"94   (BC_2,*,control,1   )               ,"&
"93   (LV_BC_7,ram_d(7)  ,bidir ,X,  94 ,1 ,Z   ),"&
"92   (BC_2,*,control,1   )               ,"&
"91   (LV_BC_7,ram_d(6)  ,bidir ,X,  92 ,1 ,Z   ),"&
"90   (BC_2,*,control,1   )               ,"&
"89   (LV_BC_7,ram_d(5)  ,bidir ,X,  90 ,1 ,Z   ),"&
"88   (BC_2,*,control,1   )               ,"&
"87   (LV_BC_7,ram_d(4)  ,bidir ,X,  88 ,1 ,Z   ),"&
"86   (BC_2,*,control,1   )               ,"&
"85   (LV_BC_7,ram_d(3)  ,bidir ,X,  86 ,1 ,Z   ),"&
"84   (BC_2,*,control,1   )               ,"&
"83   (LV_BC_7,ram_d(2)  ,bidir ,X,  84 ,1 ,Z   ),"&
"82   (BC_2,*,control,1   )               ,"&
"81   (LV_BC_7,ram_d(1)  ,bidir ,X,  82 ,1 ,Z   ),"&
"80   (BC_2,*,control,1   )               ,"&
"79   (LV_BC_7,ram_d(0)  ,bidir ,X,  80 ,1 ,Z   ),"&
"78   (BC_2,*,control,1   )               ,"&
"77   (BC_2,m0_txen   ,output3,X,  78 ,1 ,Z   ),"&
"76   (BC_2,*,control,1   )               ,"&
"75   (BC_2,m0_txd(3) ,output3,X,  76 ,1 ,Z   ),"&
"74   (BC_2,*,control,1   )               ,"&
"73   (BC_2,m0_txd(2) ,output3,X,  74 ,1 ,Z   ),"&
"72   (BC_2,*,control,1   )               ,"&
"71   (BC_2,m0_txd(1) ,output3,X,  72 ,1 ,Z   ),"&
"70   (BC_2,*,control,1   )               ,"&
"69   (BC_2,m0_txd(0) ,output3,X,  70 ,1 ,Z   ),"&
"68   (BC_2,m_mint0   ,input ,X   )               ,"&
"67   (BC_4,m0_txclk  ,clock ,X   )               ,"&
"66   (BC_2,m0_col,input ,X   )               ,"&
"65   (BC_2,m0_crs,input ,X   )               ,"&
"64   (BC_2,m0_rxer   ,input ,X   )               ,"&
"63   (BC_4,m0_rxclk  ,clock ,X   )               ,"&
"62   (BC_2,m0_rxdv   ,input ,X   )               ,"&
"61   (BC_2,m0_rxd(3) ,input ,X   )               ,"&
"60   (BC_2,m0_rxd(2) ,input ,X   )               ,"&
"59   (BC_2,m0_rxd(1) ,input ,X   )               ,"&
"58   (BC_2,m0_rxd(0) ,input ,X   )               ,"&
"57   (BC_2,*,control,1   )               ,"&
"56   (LV_BC_7,m_mdio,bidir ,X,  57 ,1 ,Z   ),"&
"55   (BC_2,*,control,1   )               ,"&
"54   (LV_BC_7,m_mdc ,bidir ,X,  55 ,1 ,Z   ),"&
"53   (BC_4,refclk,clock ,X   )               ,"&
"52   (BC_2,*,control,1   )               ,"&
"51   (BC_2,m1_txen   ,output3,X,  52 ,1 ,Z   ),"&
"50   (BC_2,*,control,1   )               ,"&
"49   (BC_2,m1_txd(3) ,output3,X,  50 ,1 ,Z   ),"&
"48   (BC_2,*,control,1   )               ,"&
"47   (BC_2,m1_txd(2) ,output3,X,  48 ,1 ,Z   ),"&
"46   (BC_2,*,control,1   )               ,"&
"45   (BC_2,m1_txd(1) ,output3,X,  46 ,1 ,Z   ),"&
"44   (BC_2,*,control,1   )               ,"&
"43   (BC_2,m1_txd(0) ,output3,X,  44 ,1 ,Z   ),"&
"42   (BC_2,m_mint1   ,input ,X   )               ,"&
"41   (BC_4,m1_txclk  ,clock ,X   )               ,"&
"40   (BC_2,m1_col,input ,X   )               ,"&
"39   (BC_2,m1_crs,input ,X   )               ,"&
"38   (BC_2,m1_rxer   ,input ,X   )               ,"&
"37   (BC_4,m1_rxclk  ,clock ,X   )               ,"&
"36   (BC_2,m1_rxdv   ,input ,X   )               ,"&
"35   (BC_2,m1_rxd(3) ,input ,X   )               ,"&
"34   (BC_2,m1_rxd(2) ,input ,X   )               ,"&
"33   (BC_2,m1_rxd(1) ,input ,X   )               ,"&
"32   (BC_2,m1_rxd(0) ,input ,X   )               ,"&
"31   (BC_2,*,control,1   )               ,"&
"30   (LV_BC_7,t_d(15)   ,bidir ,X,  31 ,1 ,Z   ),"&
"29   (BC_2,*,control,1   )               ,"&
"28   (LV_BC_7,t_d(14)   ,bidir ,X,  29 ,1 ,Z   ),"&
"27   (BC_2,*,control,1   )               ,"&
"26   (LV_BC_7,t_d(13)   ,bidir ,X,  27 ,1 ,Z   ),"&
"25   (BC_2,*,control,1   )               ,"&
"24   (LV_BC_7,t_d(12)   ,bidir ,X,  25 ,1 ,Z   ),"&
"23   (BC_2,*,control,1   )               ,"&
"22   (LV_BC_7,t_d(11)   ,bidir ,X,  23 ,1 ,Z   ),"&
"21   (BC_2,*,control,1   )               ,"&
"20   (LV_BC_7,t_d(10)   ,bidir ,X,  21 ,1 ,Z   ),"&
"19   (BC_2,*,control,1   )               ,"&
"18   (LV_BC_7,t_d(9),bidir ,X,  19 ,1 ,Z   ),"&
"17   (BC_2,*,control,1   )               ,"&
"16   (LV_BC_7,t_d(8),bidir ,X,  17 ,1 ,Z   ),"&
"15   (BC_2,*,control,1   )               ,"&
"14   (LV_BC_7,t_d(7),bidir ,X,  15 ,1 ,Z   ),"&
"13   (BC_2,*,control,1   )               ,"&
"12   (LV_BC_7,t_d(6),bidir ,X,  13 ,1 ,Z   ),"&
"11   (BC_2,*,control,1   )               ,"&
"10   (LV_BC_7,t_d(5),bidir ,X,  11 ,1 ,Z   ),"&
"9    (BC_2,*,control,1   )               ,"&
"8    (LV_BC_7,t_d(4),bidir ,X,  9,1 ,Z   ),"&
"7    (BC_2,*,control,1   )               ,"&
"6    (LV_BC_7,t_d(3),bidir ,X,  7,1 ,Z   ),"&
"5    (BC_2,*,control,1   )               ,"&
"4    (LV_BC_7,t_d(2),bidir ,X,  5,1 ,Z   ),"&
"3    (BC_2,*,control,1   )               ,"&
"2    (LV_BC_7,t_d(1),bidir ,X,  3,1 ,Z   ),"&
"1    (BC_2,*,control,1   )               ,"&
"0    (LV_BC_7,t_d(0),bidir ,X,  1,1 ,Z   ) ";

end mt90880;

This library contains 7714 BSDL files (for 6086 distinct entities) from 64 vendors
Last BSDL model (CY7C1512KV18) was added on Sep 15, 2017 14:30
info@bsdl.info