-----------------------------------------------------------------------------
-- Copyright (C) 1995-2001 . PMC-Sierra, Inc. All Rights Reserved. --
-- (formerly Quantum Effects Design, Inc.) --
-- --
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : rm5260, rm5261, rm5261a --
-- File Version : 1.20 --
-- File Created : Mon Jan 29 17:00:00 PST 2001 --
-- Package Type : QFP208 --
-----------------------------------------------------------------------------
-- Revision History: --
-- 11-03-97 1.00 First Release --
-- 1-12-98 1.10 change NC bc_7 cells to bc_2, passes HP syntax check --
-- 1-29-01 1.20 Removed leading 0's on bit vectors, some tools cannot --
-- handle this correctly. --
-- --
-----------------------------------------------------------------------------
-- NOTE: Active low ports are designated with a "B" suffix. --
-- --
-- NOTE: This chip is compliant with the 1149.1 specification. --
-- --
-----------------------------------------------------------------------------
-- This information is provided on an AS IS basis and without warranty. --
-- In no event shall Quantum Effects Design, Inc. be liable for incidental --
-- or consequential damages arising from use of this information. This --
-- disclaimer of warranty extends to the user of the information, and to --
-- their customers or users of products and is in lieu of all warranties --
-- whether express, implied, or statutory, including implied warranties of --
-- merchantability or fitness for particular purpose. --
-- --
-- Quantum Effects Design, Inc. does not represent or warrant that the --
-- information furnished hereunder is free of infringement of any third --
-- party patents, copyrights, trade secrets, or other intellectual --
-- property rights. Quantum Effects Design, Inc. does not represent or --
-- warrant that the information is free of defect, or that it meets any --
-- particular standard, requirements, or need of the user of the --
-- information or their customers. --
-- --
-- Quantum Effects Design, Inc. reserves the right to change the --
-- information in this file without notice. --
-----------------------------------------------------------------------------
entity rm5261 is
generic (PHYSICAL_PIN_MAP : string := "QFP208");
port ( JTCK: in bit;
JTDI: in bit;
JTDO: out bit;
JTMS: in bit;
BigEndian: in bit;
ColdResetB: in bit;
ExtRqstB: in bit;
IntB: in bit_vector(5 downto 0);
MasterClock: in bit;
ModeClock: out bit;
ModeIn: in bit;
NMIB: in bit;
RdRdyB: in bit;
ReleaseB: out bit;
Reserved: inout bit_vector(13 downto 2);
ResetB: in bit;
SysAD: inout bit_vector(63 downto 0);
SysADC: inout bit_vector(7 downto 0);
SysCmd: inout bit_vector(8 downto 0);
SysCmdP: inout bit;
VCCOk: in bit;
ValidInB: in bit;
ValidOutB: out bit;
WrRdyB: in bit;
-- The QFP208 package has 41 VCC, 40 VSS, 1 VCCP, 1 VSSP, 7 NC pins.
VCC_QFP208: linkage bit_vector(40 downto 0);
VSS_QFP208: linkage bit_vector(39 downto 0);
VCCP_QFP208: linkage bit;
VSSP_QFP208: linkage bit;
NC_QFP208: linkage bit_vector(6 downto 0) );
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of rm5261 : entity is "STD_1149_1_1993";
attribute PIN_MAP of rm5261 : entity is PHYSICAL_PIN_MAP;
constant QFP208: PIN_MAP_STRING :=
"BigEndian: 111, " &
"ColdResetB: 109, " &
"ExtRqstB: 107, " &
"IntB: ( 98, 97, 96, 95, 94, 93 ), " &
"JTCK: 49, " &
"JTDI: 48, " &
"JTDO: 47, " &
"JTMS: 50, " &
"MasterClock: 66, " &
"ModeClock: 46, " &
"ModeIn: 58, " &
"NMIB: 106, " &
"RdRdyB: 59, " &
"ReleaseB: 63, " &
"Reserved: ( 3, 2, 206, 205, 204, 203, 160, 159, " &
" 158, 157, 155, 154 ), " &
"ResetB: 108, " &
"SysAD: ( 174, 170, 166, 164, 151, 149, 145, 141, " &
" 139, 135, 131, 129, 125, 121, 119, 115, " &
" 43, 39, 37, 33, 29, 27, 23, 19, " &
" 17, 13, 9, 7, 200, 198, 194, 190, " &
" 173, 169, 165, 163, 150, 148, 144, 140, " &
" 138, 134, 130, 128, 124, 120, 118, 114, " &
" 42, 38, 36, 32, 28, 26, 22, 18, " &
" 16, 12, 8, 6, 199, 197, 193, 189 ), " &
"SysADC: ( 180, 176, 188, 184, 179, 175, 187, 183 ), " &
"SysCmd: ( 85, 84, 83, 80, 79, 76, 75, 74, " &
" 73 ), " &
"SysCmdP: 86, " &
"VCCOk: 110, " &
"ValidInB: 61, " &
"ValidOutB: 62, " &
"WrRdyB: 60, " &
"VCC_QFP208: ( 1, 4, 10, 14, 20, 24, 30, 34, " &
" 40, 44, 51, 56, 67, 69, 71, 77, 81, " &
" 87, 89, 91, 99, 105, 112, 116, 122, " &
" 126, 132, 136, 142, 146, 152, 161, 167, " &
" 171, 177, 181, 185, 191, 195, 201, 207 ), " &
"VSS_QFP208: ( 5, 11, 15, 21, 25, 31, 35, 41, " &
" 45, 52, 57, 68, 70, 72, 78, 82, " &
" 88, 90, 92, 100, 113, 117, 123, 127, " &
" 133, 137, 143, 147, 153, 156, 162, 168, " &
" 172, 178, 182, 186, 192, 196, 202, 208 ), " &
"VCCP_QFP208: 64, " &
"VSSP_QFP208: 65, " &
"NC_QFP208: ( 53, 54, 55, 101, 102, 103, 104 ) " ;
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_CLOCK of JTCK : signal is (20.0e6, BOTH);
attribute INSTRUCTION_LENGTH of rm5261 : entity is 3 ;
attribute INSTRUCTION_OPCODE of rm5261 : entity is
"EXTEST (000)," &
"SAMPLE (110)," &
"BYPASS (111)," &
"PRIVATE001 (001)," &
"PRIVATE002 (010)," &
"PRIVATE003 (011)," &
"PRIVATE004 (100)," &
"PRIVATE005 (101)" ;
attribute INSTRUCTION_CAPTURE of rm5261 : entity is "001";
attribute INSTRUCTION_PRIVATE of rm5261 : entity is
"PRIVATE001 ," &
"PRIVATE002 ," &
"PRIVATE003 ," &
"PRIVATE004 ," &
"PRIVATE005 " ;
attribute REGISTER_ACCESS of rm5261 : entity is
"BYPASS(BYPASS)";
-- attribute BOUNDARY_CELLS of rm5261 : entity is
-- "BC_1, BC_2, BC_4, BC_7";
attribute BOUNDARY_LENGTH of rm5261 : entity is 246;
-- PORT DESCRIPTION TERMS --
--------------------------------------------
-- cell type: BC-1 output only data bit
-- BC_2 oe control bit
-- BC_4 input data bit
-- BC_7 bidirectional data bit
-- port: port name with index if port description says bit_vector
-- function
-- input: input only
-- bidir: bidirectional
-- control: control cell
-- output3: three state output
-- safe: value in control cell to make input = 0 for bidir and control
-- ccell: controlling cell number for I/O direction
-- dsval: disabling (input) value
-- rslt: result if disabled (input = Z)
-- tdo = first cell shifted in during ShifDR
-- num cell port function safe ccell dsval rslt
attribute BOUNDARY_REGISTER of rm5261 : entity is
"0 (BC_1, ModeClock, output3, 0, 1, 0, Z), "&
"1 (BC_2, *, control, 0), "&
"2 (BC_7, SysAD(47), bidir, 0, 3, 0, Z), "&
"3 (BC_2, *, control, 0), "&
"4 (BC_7, SysAD(15), bidir, 0, 5, 0, Z), "&
"5 (BC_2, *, control, 0), "&
"6 (BC_7, SysAD(46), bidir, 0, 7, 0, Z), "&
"7 (BC_2, *, control, 0), "&
"8 (BC_7, SysAD(14), bidir, 0, 9, 0, Z), "&
"9 (BC_2, *, control, 0), "&
"10 (BC_7, SysAD(45), bidir, 0, 11, 0, Z), "&
"11 (BC_2, *, control, 0), "&
"12 (BC_7, SysAD(13), bidir, 0, 13, 0, Z), "&
"13 (BC_2, *, control, 0), "&
"14 (BC_7, SysAD(44), bidir, 0, 15, 0, Z), "&
"15 (BC_2, *, control, 0), "&
"16 (BC_7, SysAD(12), bidir, 0, 17, 0, Z), "&
"17 (BC_2, *, control, 0), "&
"18 (BC_7, SysAD(43), bidir, 0, 19, 0, Z), "&
"19 (BC_2, *, control, 0), "&
"20 (BC_7, SysAD(11), bidir, 0, 21, 0, Z), "&
"21 (BC_2, *, control, 0), "&
"22 (BC_7, SysAD(42), bidir, 0, 23, 0, Z), "&
"23 (BC_2, *, control, 0), "&
"24 (BC_7, SysAD(10), bidir, 0, 25, 0, Z), "&
"25 (BC_2, *, control, 0), "&
"26 (BC_7, SysAD(41), bidir, 0, 27, 0, Z), "&
"27 (BC_2, *, control, 0), "&
"28 (BC_7, SysAD(9), bidir, 0, 29, 0, Z), "&
"29 (BC_2, *, control, 0), "&
"30 (BC_7, SysAD(40), bidir, 0, 31, 0, Z), "&
"31 (BC_2, *, control, 0), "&
"32 (BC_7, SysAD(8), bidir, 0, 33, 0, Z), "&
"33 (BC_2, *, control, 0), "&
"34 (BC_7, SysAD(39), bidir, 0, 35, 0, Z), "&
"35 (BC_2, *, control, 0), "&
"36 (BC_7, SysAD(7), bidir, 0, 37, 0, Z), "&
"37 (BC_2, *, control, 0), "&
"38 (BC_7, SysAD(38), bidir, 0, 39, 0, Z), "&
"39 (BC_2, *, control, 0), "&
"40 (BC_7, SysAD(6), bidir, 0, 41, 0, Z), "&
"41 (BC_2, *, control, 0), "&
"42 (BC_7, SysAD(37), bidir, 0, 43, 0, Z), "&
"43 (BC_2, *, control, 0), "&
"44 (BC_7, SysAD(5), bidir, 0, 45, 0, Z), "&
"45 (BC_2, *, control, 0), "&
"46 (BC_7, SysAD(36), bidir, 0, 47, 0, Z), "&
"47 (BC_2, *, control, 0), "&
"48 (BC_7, SysAD(4), bidir, 0, 49, 0, Z), "&
"49 (BC_2, *, control, 0), "&
"50 (BC_2, *, internal, X), "&
"51 (BC_2, *, internal, X), "&
"52 (BC_2, *, internal, X), "&
"53 (BC_2, *, internal, X), "&
"54 (BC_7, Reserved(13),bidir, 0, 55, 0, Z), "&
"55 (BC_2, *, control, 0), "&
"56 (BC_7, Reserved(12),bidir, 0, 57, 0, Z), "&
"57 (BC_2, *, control, 0), "&
"58 (BC_7, Reserved(11),bidir, 0, 59, 0, Z), "&
"59 (BC_2, *, control, 0), "&
"60 (BC_7, Reserved(10),bidir, 0, 61, 0, Z), "&
"61 (BC_2, *, control, 0), "&
"62 (BC_7, Reserved(9), bidir, 0, 63, 0, Z), "&
"63 (BC_2, *, control, 0), "&
"64 (BC_7, Reserved(8), bidir, 0, 65, 0, Z), "&
"65 (BC_2, *, control, 0), "&
"66 (BC_7, SysAD(35), bidir, 0, 67, 0, Z), "&
"67 (BC_2, *, control, 0), "&
"68 (BC_7, SysAD(3), bidir, 0, 69, 0, Z), "&
"69 (BC_2, *, control, 0), "&
"70 (BC_7, SysAD(34), bidir, 0, 71, 0, Z), "&
"71 (BC_2, *, control, 0), "&
"72 (BC_7, SysAD(2), bidir, 0, 73, 0, Z), "&
"73 (BC_2, *, control, 0), "&
"74 (BC_7, SysAD(33), bidir, 0, 75, 0, Z), "&
"75 (BC_2, *, control, 0), "&
"76 (BC_7, SysAD(1), bidir, 0, 77, 0, Z), "&
"77 (BC_2, *, control, 0), "&
"78 (BC_7, SysAD(32), bidir, 0, 79, 0, Z), "&
"79 (BC_2, *, control, 0), "&
"80 (BC_7, SysAD(0), bidir, 0, 81, 0, Z), "&
"81 (BC_2, *, control, 0), "&
"82 (BC_7, SysADC(5), bidir, 0, 83, 0, Z), "&
"83 (BC_2, *, control, 0), "&
"84 (BC_7, SysADC(1), bidir, 0, 85, 0, Z), "&
"85 (BC_2, *, control, 0), "&
"86 (BC_7, SysADC(4), bidir, 0, 87, 0, Z), "&
"87 (BC_2, *, control, 0), "&
"88 (BC_7, SysADC(0), bidir, 0, 89, 0, Z), "&
"89 (BC_2, *, control, 0), "&
"90 (BC_7, SysADC(7), bidir, 0, 91, 0, Z), "&
"91 (BC_2, *, control, 0), "&
"92 (BC_7, SysADC(3), bidir, 0, 93, 0, Z), "&
"93 (BC_2, *, control, 0), "&
"94 (BC_7, SysADC(6), bidir, 0, 95, 0, Z), "&
"95 (BC_2, *, control, 0), "&
"96 (BC_7, SysADC(2), bidir, 0, 97, 0, Z), "&
"97 (BC_2, *, control, 0), "&
"98 (BC_7, SysAD(63), bidir, 0, 99, 0, Z), "&
"99 (BC_2, *, control, 0), "&
"100 (BC_7, SysAD(31), bidir, 0, 101, 0, Z), "&
"101 (BC_2, *, control, 0), "&
"102 (BC_7, SysAD(62), bidir, 0, 103, 0, Z), "&
"103 (BC_2, *, control, 0), "&
"104 (BC_7, SysAD(30), bidir, 0, 105, 0, Z), "&
"105 (BC_2, *, control, 0), "&
"106 (BC_7, SysAD(61), bidir, 0, 107, 0, Z), "&
"107 (BC_2, *, control, 0), "&
"108 (BC_7, SysAD(29), bidir, 0, 109, 0, Z), "&
"109 (BC_2, *, control, 0), "&
"110 (BC_7, SysAD(60), bidir, 0, 111, 0, Z), "&
"111 (BC_2, *, control, 0), "&
"112 (BC_7, SysAD(28), bidir, 0, 113, 0, Z), "&
"113 (BC_2, *, control, 0), "&
"114 (BC_7, Reserved(7), bidir, 0, 115, 0, Z), "&
"115 (BC_2, *, control, 0), "&
"116 (BC_7, Reserved(6), bidir, 0, 117, 0, Z), "&
"117 (BC_2, *, control, 0), "&
"118 (BC_7, Reserved(5), bidir, 0, 119, 0, Z), "&
"119 (BC_2, *, control, 0), "&
"120 (BC_7, Reserved(4), bidir, 0, 121, 0, Z), "&
"121 (BC_2, *, control, 0), "&
"122 (BC_7, Reserved(3), bidir, 0, 123, 0, Z), "&
"123 (BC_2, *, control, 0), "&
"124 (BC_7, Reserved(2), bidir, 0, 125, 0, Z), "&
"125 (BC_2, *, control, 0), "&
"126 (BC_2, *, internal, X), "&
"127 (BC_2, *, internal, X), "&
"128 (BC_2, *, internal, X), "&
"129 (BC_2, *, internal, X), "&
"130 (BC_7, SysAD(59), bidir, 0, 131, 0, Z), "&
"131 (BC_2, *, control, 0), "&
"132 (BC_7, SysAD(27), bidir, 0, 133, 0, Z), "&
"133 (BC_2, *, control, 0), "&
"134 (BC_7, SysAD(58), bidir, 0, 135, 0, Z), "&
"135 (BC_2, *, control, 0), "&
"136 (BC_7, SysAD(26), bidir, 0, 137, 0, Z), "&
"137 (BC_2, *, control, 0), "&
"138 (BC_7, SysAD(57), bidir, 0, 139, 0, Z), "&
"139 (BC_2, *, control, 0), "&
"140 (BC_7, SysAD(25), bidir, 0, 141, 0, Z), "&
"141 (BC_2, *, control, 0), "&
"142 (BC_7, SysAD(56), bidir, 0, 143, 0, Z), "&
"143 (BC_2, *, control, 0), "&
"144 (BC_7, SysAD(24), bidir, 0, 145, 0, Z), "&
"145 (BC_2, *, control, 0), "&
"146 (BC_7, SysAD(55), bidir, 0, 147, 0, Z), "&
"147 (BC_2, *, control, 0), "&
"148 (BC_7, SysAD(23), bidir, 0, 149, 0, Z), "&
"149 (BC_2, *, control, 0), "&
"150 (BC_7, SysAD(54), bidir, 0, 151, 0, Z), "&
"151 (BC_2, *, control, 0), "&
"152 (BC_7, SysAD(22), bidir, 0, 153, 0, Z), "&
"153 (BC_2, *, control, 0), "&
"154 (BC_7, SysAD(53), bidir, 0, 155, 0, Z), "&
"155 (BC_2, *, control, 0), "&
"156 (BC_7, SysAD(21), bidir, 0, 157, 0, Z), "&
"157 (BC_2, *, control, 0), "&
"158 (BC_7, SysAD(52), bidir, 0, 159, 0, Z), "&
"159 (BC_2, *, control, 0), "&
"160 (BC_7, SysAD(20), bidir, 0, 161, 0, Z), "&
"161 (BC_2, *, control, 0), "&
"162 (BC_7, SysAD(51), bidir, 0, 163, 0, Z), "&
"163 (BC_2, *, control, 0), "&
"164 (BC_7, SysAD(19), bidir, 0, 165, 0, Z), "&
"165 (BC_2, *, control, 0), "&
"166 (BC_7, SysAD(50), bidir, 0, 167, 0, Z), "&
"167 (BC_2, *, control, 0), "&
"168 (BC_7, SysAD(18), bidir, 0, 169, 0, Z), "&
"169 (BC_2, *, control, 0), "&
"170 (BC_7, SysAD(49), bidir, 0, 171, 0, Z), "&
"171 (BC_2, *, control, 0), "&
"172 (BC_7, SysAD(17), bidir, 0, 173, 0, Z), "&
"173 (BC_2, *, control, 0), "&
"174 (BC_7, SysAD(48), bidir, 0, 175, 0, Z), "&
"175 (BC_2, *, control, 0), "&
"176 (BC_7, SysAD(16), bidir, 0, 177, 0, Z), "&
"177 (BC_2, *, control, 0), "&
"178 (BC_4, BigEndian, input, X), "&
"179 (BC_4, VCCOk, input, X), "&
"180 (BC_4, ColdResetB, input, X), "&
"181 (BC_4, ResetB, input, X), "&
"182 (BC_4, ExtRqstB, input, X), "&
"183 (BC_4, NMIB, input, X), "&
"184 (BC_4, IntB(5), input, X), "&
"185 (BC_4, IntB(4), input, X), "&
"186 (BC_4, IntB(3), input, X), "&
"187 (BC_4, IntB(2), input, X), "&
"188 (BC_4, IntB(1), input, X), "&
"189 (BC_4, IntB(0), input, X), "&
"190 (BC_4, *, internal, X), "&
"191 (BC_1, *, internal, X), "&
"192 (BC_2, *, internal, X), "&
"193 (BC_1, *, internal, X), "&
"194 (BC_2, *, internal, X), "&
"195 (BC_1, *, internal, X), "&
"196 (BC_2, *, internal, X), "&
"197 (BC_1, *, internal, X), "&
"198 (BC_2, *, internal, X), "&
"199 (BC_1, *, internal, X), "&
"200 (BC_2, *, internal, X), "&
"201 (BC_7, SysCmdP, bidir, 0, 202, 0, Z), "&
"202 (BC_2, *, control, 0), "&
"203 (BC_7, SysCmd(8), bidir, 0, 204, 0, Z), "&
"204 (BC_2, *, control, 0), "&
"205 (BC_7, SysCmd(7), bidir, 0, 206, 0, Z), "&
"206 (BC_2, *, control, 0), "&
"207 (BC_7, SysCmd(6), bidir, 0, 208, 0, Z), "&
"208 (BC_2, *, control, 0), "&
"209 (BC_7, SysCmd(5), bidir, 0, 210, 0, Z), "&
"210 (BC_2, *, control, 0), "&
"211 (BC_7, SysCmd(4), bidir, 0, 212, 0, Z), "&
"212 (BC_2, *, control, 0), "&
"213 (BC_7, SysCmd(3), bidir, 0, 214, 0, Z), "&
"214 (BC_2, *, control, 0), "&
"215 (BC_7, SysCmd(2), bidir, 0, 216, 0, Z), "&
"216 (BC_2, *, control, 0), "&
"217 (BC_7, SysCmd(1), bidir, 0, 218, 0, Z), "&
"218 (BC_2, *, control, 0), "&
"219 (BC_7, SysCmd(0), bidir, 0, 220, 0, Z), "&
"220 (BC_2, *, control, 0), "&
"221 (BC_1, *, internal, X), "&
"222 (BC_2, *, internal, X), "&
"223 (BC_1, *, internal, X), "&
"224 (BC_2, *, internal, X), "&
"225 (BC_1, *, internal, X), "&
"226 (BC_2, *, internal, X), "&
"227 (BC_1, *, internal, X), "&
"228 (BC_2, *, internal, X), "&
"229 (BC_2, *, internal, X), "&
"230 (BC_2, *, internal, X), "&
"231 (BC_2, *, internal, X), "&
"232 (BC_2, *, internal, X), "&
"233 (BC_2, *, internal, X), "&
"234 (BC_2, *, internal, X), "&
"235 (BC_4, MasterClock, input, X), "&
"236 (BC_1, ReleaseB, output3, 0, 237, 0, Z), "&
"237 (BC_2, *, control, 0), "&
"238 (BC_1, ValidOutB, output3, 0, 239, 0, Z), "&
"239 (BC_2, *, control, 0), "&
"240 (BC_4, ValidInB, input, X), "&
"241 (BC_4, WrRdyB, input, X), "&
"242 (BC_4, RdRdyB, input, X), "&
"243 (BC_4, *, internal, X), "&
"244 (BC_4, ModeIn, input, X), "&
"245 (BC_4, *, internal, X) ";
-- tdi = last cell shifted in during ShiftDR
end rm5261;