--
-- Boundary Scan Description Language (BSDL) File
-- Generated by Daphne version: 2018.03.27 at: Thu Sep 13 16:00:20 2018
--
-- Device: nevis3
-- Package Type: NEVIS_64LQFP
--
entity nevis3 is
generic (PHYSICAL_PIN_MAP : string := "NEVIS_64LQFP");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
GPIOA0: inout bit;
GPIOA1: inout bit;
GPIOA2: inout bit;
GPIOA3: inout bit;
GPIOA4: inout bit;
GPIOA5: inout bit;
GPIOA6: inout bit;
GPIOA7: inout bit;
GPIOB0: inout bit;
GPIOB1: inout bit;
GPIOB2: inout bit;
GPIOB3: inout bit;
GPIOB4: inout bit;
GPIOB5: inout bit;
GPIOB6: inout bit;
GPIOB7: inout bit;
GPIOC0: inout bit;
GPIOC1: inout bit;
GPIOC10: inout bit;
GPIOC11: inout bit;
GPIOC12: inout bit;
GPIOC13: inout bit;
GPIOC14: inout bit;
GPIOC15: inout bit;
GPIOC2: inout bit;
GPIOC3: inout bit;
GPIOC4: inout bit;
GPIOC5: inout bit;
GPIOC6: inout bit;
GPIOC7: inout bit;
GPIOC8: inout bit;
GPIOC9: inout bit;
GPIOE0: inout bit;
GPIOE1: inout bit;
GPIOE2: inout bit;
GPIOE3: inout bit;
GPIOE4: inout bit;
GPIOE5: inout bit;
GPIOE6: inout bit;
GPIOE7: inout bit;
GPIOF0: inout bit;
GPIOF1: inout bit;
GPIOF2: inout bit;
GPIOF3: inout bit;
GPIOF4: inout bit;
GPIOF5: inout bit;
GPIOF6: inout bit;
GPIOF7: inout bit;
GPIOF8: inout bit;
RESETB: inout bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
NC: linkage bit;
VDD: linkage bit_vector(0 to 1);
VDD33: linkage bit_vector(0 to 2);
VDDA: linkage bit;
VSS: linkage bit_vector(0 to 2);
VSSA: linkage bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of nevis3: entity is "STD_1149_1_2001";
attribute PIN_MAP of nevis3: entity is PHYSICAL_PIN_MAP;
constant NEVIS_64LQFP :PIN_MAP_STRING :=
"GPIOA0: 13," &
"GPIOA1: 14," &
"GPIOA2: 15," &
"GPIOA3: 16," &
"GPIOA4: 12," &
"GPIOA5: 11," &
"GPIOA6: 10," &
"GPIOA7: 9," &
"GPIOB0: 24," &
"GPIOB1: 25," &
"GPIOB2: 27," &
"GPIOB3: 28," &
"GPIOB4: 21," &
"GPIOB5: 20," &
"GPIOB6: 19," &
"GPIOB7: 17," &
"GPIOC0: 3," &
"GPIOC1: 4," &
"GPIOC10: 35," &
"GPIOC11: 37," &
"GPIOC12: 38," &
"GPIOC13: 49," &
"GPIOC14: 55," &
"GPIOC15: 56," &
"GPIOC2: 5," &
"GPIOC3: 7," &
"GPIOC4: 8," &
"GPIOC5: 18," &
"GPIOC6: 31," &
"GPIOC7: 32," &
"GPIOC8: 33," &
"GPIOC9: 34," &
"GPIOE0: 45," &
"GPIOE1: 46," &
"GPIOE2: 47," &
"GPIOE3: 48," &
"GPIOE4: 51," &
"GPIOE5: 52," &
"GPIOE6: 53," &
"GPIOE7: 54," &
"GPIOF0: 36," &
"GPIOF1: 50," &
"GPIOF2: 39," &
"GPIOF3: 40," &
"GPIOF4: 41," &
"GPIOF5: 42," &
"GPIOF6: 58," &
"GPIOF7: 59," &
"GPIOF8: 6," &
"RESETB: 2," &
"TCK: 1," &
"TDI: 64," &
"TDO: 62," &
"TMS: 63," &
"NC: 65," &
"VDD: (26, 57)," &
"VDD33: (29, 44, 60)," &
"VDDA: 22," &
"VSS: (30, 43, 61)," &
"VSSA: 23" ;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07,BOTH);
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute INSTRUCTION_LENGTH of nevis3: entity is 8;
attribute INSTRUCTION_OPCODE of nevis3: entity is
"BYPASS (11111111)," &
"CLAMP (00000111)," &
"EXTEST (00000000)," &
"HIGHZ (00000110)," &
"IDCODE (00000010)," &
"PRELOAD (00000001)," &
"SAMPLE (00000001)," &
"DTR (00000011)," &
"KTR (00000100)," &
"KTR1 (00001001)," &
"MCR (00001011)," &
"SCR (00001000)," &
"TDR0 (00010000)," &
"TDR1 (00010001)," &
"TDR2 (00010010)," &
"TDR3 (00010011)," &
"TDR4 (00010100)," &
"TDR5 (00010101)," &
"TDR6 (00010110)," &
"TLM_SEL (00000101)";
attribute INSTRUCTION_CAPTURE of nevis3: entity is "00000001";
attribute INSTRUCTION_PRIVATE of nevis3: entity is
"DTR," &
"KTR," &
"KTR1," &
"MCR," &
"SCR," &
"TDR0," &
"TDR1," &
"TDR2," &
"TDR3," &
"TDR4," &
"TDR5," &
"TDR6," &
"TLM_SEL";
attribute IDCODE_REGISTER of nevis3: entity is
"0000" & -- Version
"1011001101000101" & -- Part Number
"01100001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of nevis3: entity is
"BYPASS (TLM_SEL)," &
"TDR_5[18] (TDR5)";
attribute BOUNDARY_LENGTH of nevis3: entity is 157;
attribute BOUNDARY_REGISTER of nevis3: entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
-- num cell port/* function safe [ccell dis rslt]
" 0 (BC_2, *, control, 0) ," &
" 1 (BC_7, GPIOF7, bidir, X, 0, 0, Z) ," &
" 2 (BC_2, *, control, 0) ," &
" 3 (BC_7, GPIOF6, bidir, X, 2, 0, Z) ," &
" 4 (BC_2, *, internal, X) ," &
" 5 (BC_2, *, internal, X) ," &
" 6 (BC_2, *, internal, X) ," &
" 7 (BC_2, *, internal, X) ," &
" 8 (BC_2, *, internal, X) ," &
" 9 (BC_2, *, internal, X) ," &
" 10 (BC_2, *, internal, X) ," &
" 11 (BC_2, *, internal, X) ," &
" 12 (BC_2, *, control, 0) ," &
" 13 (BC_7, GPIOC15, bidir, X, 12, 0, Z) ," &
" 14 (BC_2, *, control, 0) ," &
" 15 (BC_7, GPIOC14, bidir, X, 14, 0, Z) ," &
" 16 (BC_2, *, internal, X) ," &
" 17 (BC_2, *, internal, X) ," &
" 18 (BC_2, *, control, 0) ," &
" 19 (BC_7, GPIOE7, bidir, X, 18, 0, Z) ," &
" 20 (BC_2, *, control, 0) ," &
" 21 (BC_7, GPIOE6, bidir, X, 20, 0, Z) ," &
" 22 (BC_2, *, control, 0) ," &
" 23 (BC_7, GPIOE5, bidir, X, 22, 0, Z) ," &
" 24 (BC_2, *, control, 0) ," &
" 25 (BC_7, GPIOE4, bidir, X, 24, 0, Z) ," &
" 26 (BC_2, *, internal, X) ," &
" 27 (BC_2, *, internal, X) ," &
" 28 (BC_2, *, internal, X) ," &
" 29 (BC_2, *, internal, X) ," &
" 30 (BC_2, *, internal, X) ," &
" 31 (BC_2, *, internal, X) ," &
" 32 (BC_2, *, internal, X) ," &
" 33 (BC_2, *, internal, X) ," &
" 34 (BC_2, *, control, 0) ," &
" 35 (BC_7, GPIOF1, bidir, X, 34, 0, Z) ," &
" 36 (BC_2, *, control, 0) ," &
" 37 (BC_7, GPIOC13, bidir, X, 36, 0, Z) ," &
" 38 (BC_2, *, control, 0) ," &
" 39 (BC_7, GPIOE3, bidir, X, 38, 0, Z) ," &
" 40 (BC_2, *, control, 0) ," &
" 41 (BC_7, GPIOE2, bidir, X, 40, 0, Z) ," &
" 42 (BC_2, *, internal, X) ," &
" 43 (BC_2, *, internal, X) ," &
" 44 (BC_2, *, internal, X) ," &
" 45 (BC_2, *, internal, X) ," &
" 46 (BC_2, *, internal, X) ," &
" 47 (BC_2, *, internal, X) ," &
" 48 (BC_2, *, internal, X) ," &
" 49 (BC_2, *, internal, X) ," &
" 50 (BC_2, *, control, 0) ," &
" 51 (BC_7, GPIOE1, bidir, X, 50, 0, Z) ," &
" 52 (BC_2, *, control, 0) ," &
" 53 (BC_7, GPIOE0, bidir, X, 52, 0, Z) ," &
" 54 (BC_2, *, internal, X) ," &
" 55 (BC_2, *, internal, X) ," &
" 56 (BC_2, *, internal, X) ," &
" 57 (BC_2, *, internal, X) ," &
" 58 (BC_2, *, control, 0) ," &
" 59 (BC_7, GPIOF5, bidir, X, 58, 0, Z) ," &
" 60 (BC_2, *, control, 0) ," &
" 61 (BC_7, GPIOF4, bidir, X, 60, 0, Z) ," &
" 62 (BC_2, *, control, 0) ," &
" 63 (BC_7, GPIOF3, bidir, X, 62, 0, Z) ," &
" 64 (BC_2, *, control, 0) ," &
" 65 (BC_7, GPIOF2, bidir, X, 64, 0, Z) ," &
" 66 (BC_2, *, control, 0) ," &
" 67 (BC_7, GPIOC12, bidir, X, 66, 0, Z) ," &
" 68 (BC_2, *, control, 0) ," &
" 69 (BC_7, GPIOC11, bidir, X, 68, 0, Z) ," &
" 70 (BC_2, *, internal, X) ," &
" 71 (BC_2, *, internal, X) ," &
" 72 (BC_2, *, internal, X) ," &
" 73 (BC_2, *, internal, X) ," &
" 74 (BC_2, *, control, 0) ," &
" 75 (BC_7, GPIOF0, bidir, X, 74, 0, Z) ," &
" 76 (BC_2, *, control, 0) ," &
" 77 (BC_7, GPIOC10, bidir, X, 76, 0, Z) ," &
" 78 (BC_2, *, control, 0) ," &
" 79 (BC_7, GPIOC9, bidir, X, 78, 0, Z) ," &
" 80 (BC_2, *, control, 0) ," &
" 81 (BC_7, GPIOC8, bidir, X, 80, 0, Z) ," &
" 82 (BC_2, *, internal, X) ," &
" 83 (BC_2, *, internal, X) ," &
" 84 (BC_2, *, control, 0) ," &
" 85 (BC_7, GPIOC7, bidir, X, 84, 0, Z) ," &
" 86 (BC_2, *, control, 0) ," &
" 87 (BC_7, GPIOC6, bidir, X, 86, 0, Z) ," &
" 88 (BC_2, *, internal, X) ," &
" 89 (BC_2, *, internal, X) ," &
" 90 (BC_2, *, internal, X) ," &
" 91 (BC_2, *, internal, X) ," &
" 92 (BC_2, *, internal, X) ," &
" 93 (BC_2, *, internal, X) ," &
" 94 (BC_2, *, internal, X) ," &
" 95 (BC_2, *, internal, X) ," &
" 96 (BC_2, *, control, 0) ," &
" 97 (BC_7, GPIOB3, bidir, X, 96, 0, Z) ," &
" 98 (BC_2, *, internal, X) ," &
" 99 (BC_2, *, internal, X) ," &
" 100 (BC_2, *, internal, X) ," &
" 101 (BC_2, *, internal, X) ," &
" 102 (BC_2, *, control, 0) ," &
" 103 (BC_7, GPIOB2, bidir, X, 102, 0, Z) ," &
" 104 (BC_2, *, control, 0) ," &
" 105 (BC_7, GPIOB1, bidir, X, 104, 0, Z) ," &
" 106 (BC_2, *, control, 0) ," &
" 107 (BC_7, GPIOB0, bidir, X, 106, 0, Z) ," &
" 108 (BC_2, *, control, 0) ," &
" 109 (BC_7, GPIOB4, bidir, X, 108, 0, Z) ," &
" 110 (BC_2, *, control, 0) ," &
" 111 (BC_7, GPIOB5, bidir, X, 110, 0, Z) ," &
" 112 (BC_2, *, control, 0) ," &
" 113 (BC_7, GPIOB6, bidir, X, 112, 0, Z) ," &
" 114 (BC_2, *, control, 0) ," &
" 115 (BC_7, GPIOC5, bidir, X, 114, 0, Z) ," &
" 116 (BC_2, *, control, 0) ," &
" 117 (BC_7, GPIOB7, bidir, X, 116, 0, Z) ," &
" 118 (BC_2, *, control, 0) ," &
" 119 (BC_7, GPIOA3, bidir, X, 118, 0, Z) ," &
" 120 (BC_2, *, control, 0) ," &
" 121 (BC_7, GPIOA2, bidir, X, 120, 0, Z) ," &
" 122 (BC_2, *, control, 0) ," &
" 123 (BC_7, GPIOA1, bidir, X, 122, 0, Z) ," &
" 124 (BC_2, *, control, 0) ," &
" 125 (BC_7, GPIOA0, bidir, X, 124, 0, Z) ," &
" 126 (BC_2, *, control, 0) ," &
" 127 (BC_7, GPIOA4, bidir, X, 126, 0, Z) ," &
" 128 (BC_2, *, control, 0) ," &
" 129 (BC_7, GPIOA5, bidir, X, 128, 0, Z) ," &
" 130 (BC_2, *, control, 0) ," &
" 131 (BC_7, GPIOA6, bidir, X, 130, 0, Z) ," &
" 132 (BC_2, *, internal, X) ," &
" 133 (BC_2, *, internal, X) ," &
" 134 (BC_2, *, control, 0) ," &
" 135 (BC_7, GPIOA7, bidir, X, 134, 0, Z) ," &
" 136 (BC_2, *, internal, X) ," &
" 137 (BC_2, *, internal, X) ," &
" 138 (BC_2, *, internal, X) ," &
" 139 (BC_2, *, internal, X) ," &
" 140 (BC_2, *, control, 0) ," &
" 141 (BC_7, GPIOC4, bidir, X, 140, 0, Z) ," &
" 142 (BC_2, *, control, 0) ," &
" 143 (BC_7, GPIOC3, bidir, X, 142, 0, Z) ," &
" 144 (BC_2, *, internal, X) ," &
" 145 (BC_2, *, internal, X) ," &
" 146 (BC_2, *, internal, X) ," &
" 147 (BC_2, *, internal, X) ," &
" 148 (BC_2, *, control, 0) ," &
" 149 (BC_7, GPIOF8, bidir, X, 148, 0, Z) ," &
" 150 (BC_2, *, control, 0) ," &
" 151 (BC_7, GPIOC2, bidir, X, 150, 0, Z) ," &
" 152 (BC_2, *, control, 0) ," &
" 153 (BC_7, GPIOC1, bidir, X, 152, 0, Z) ," &
" 154 (BC_2, *, control, 0) ," &
" 155 (BC_7, GPIOC0, bidir, X, 154, 0, Z) ," &
" 156 (BC_8, RESETB, bidir, 1, 156, 1, WEAK1)";
end nevis3;
